USE OF TRANSISTOR
Abstract: Marquardt Switches transistor model list
Text: Transistor Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdupenlo, tlemeuni, rmayr}@altera.com ABSTRACT This paper discusses the use of transistor abstraction to enable the
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"RF MOSFETs"
Abstract: "vlsi technology" abstract for n channel depletion MOSFET depletion p mosfet RF MOSFETs AN1226 mosfet for different channel length AN1228 n mosfet depletion mosfet p-type
Text: AN1226 APPLICATION NOTE UNDERSTANDING LDMOS DEVICE FUNDAMENTALS John Pritiskutch - Brett Hanson 1. ABSTRACT This paper focuses on the structural aspects of two basic types of RF power MOSFETS: the DMOS and the LDMOS. The comparison of the DMOS and LDMOS structures reveals the basic fundamentals of the
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AN1226
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Abstract: No abstract text available
Text: Freescale Semiconductor, Inc. Order number: AN1405 Rev 1, 09/2001 APPLICATION NOTE AN1405 ECL Clock Distribution Techniques By: Todd Pearson ECL Applications Engineering ABSTRACT This application note provides information on system design using ECL logic technologies for reducing system clock skew
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Abstract: No abstract text available
Text: MOTOROLA Order Number: AN1405/D SEMICONDUCTOR TECHNICAL DATA Rev 1, 09/2001 AN1405 ECL Clock Distribution Techniques Prepared by: Todd Pearson ECL Applications Engineering Abstract This application note provides information on system design using ECL logic technologies for reducing system clock skew
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Abstract: No abstract text available
Text: MOTOROLA Order Number: AN1405/D SEMICONDUCTOR TECHNICAL DATA Rev 1, 09/2001 AN1405 ECL Clock Distribution Techniques Prepared by: Todd Pearson ECL Applications Engineering Abstract This application note provides information on system design using ECL logic technologies for reducing system clock skew
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flash "high temperature data retention" mechanism
Abstract: Angstrem Hebrew material science and technology 1117 FG 0.18-um CMOS Flash technology DSASW0037374
Text: SuperFlash Memory Program/Erase Endurance Viktor Markov, Xian Liu, Alexander Kotov, Amitay Levi, Tho Ngoc Dang, and Yuri Tkachev Silicon Storage Technology, Inc., 1171 Sonora Court, Sunnyvale, CA 94086, E-mail: akotov@sst.com Abstract––Program/erase endurance data for SuperFlash
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flash "high temperature data retention" mechanism
Angstrem
Hebrew
material science and technology
1117 FG
0.18-um CMOS Flash technology
DSASW0037374
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"vlsi technology" abstract
Abstract: magnetic read switch circuit current conveyors BL14 "vlsi technology" abstract for free ieee paper on vlsi
Text: To be published at VLSI Symposium 2002 A low power 1Mbit MRAM based on 1T1MTJ bit cell integrated with Copper Interconnects M. Durlam, P. Naji, A. Omair, M. DeHerrera, J. Calder, J. M. Slaughter, B. Engel, N. Rizzo, G. Grynkewich, B. Butcher, C. Tracy, K. Smith, K. Kyler, J. Ren, J. Molla, B. Feil, R. Williams, S. Tehrani
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magnetic read switch circuit
current conveyors
BL14
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free ieee paper on vlsi
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"RF MOSFETs"
Abstract: n mosfet depletion depletion p mosfet "vlsi technology" abstract for N CHANNEL DEPLETION MOSFET p channel depletion mosfet RF MOSFETs "vlsi technology" abstract AN1226 n mosfet depletion note
Text: AN1226 APPLICATION NOTE UNDERSTANDING LDMOS DEVICE FUNDAMENTALS John Pritiskutch - Brett Hanson 1. ABSTRACT This paper focuses on the structural aspects of two basic types of RF power MOSFETS: the DMOS and the LDMOS. The comparison of the DMOS and LDMOS structures reveals the basic fundamentals of the
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AN1226
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n mosfet depletion
depletion p mosfet
"vlsi technology" abstract for
N CHANNEL DEPLETION MOSFET
p channel depletion mosfet
RF MOSFETs
"vlsi technology" abstract
AN1226
n mosfet depletion note
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vhdl projects abstract and coding
Abstract: vhdl convolution coding "vlsi technology" abstract XCV200 Visicom
Text: Success Story VisiCom Uses Xilinx FPGAs for a Reconfigurable The combination of the Virtex hardware, associated software tools, and engineering process improvements have proven to be a great success. Image Processing Module by Tamara Snowden, Public Relations, Xilinx, tamaras@xilinx.com
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vhdl convolution coding
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TRANSISTOR 30GHZ
Abstract: "vlsi technology" abstract for Marconi Optical Components Bipolar HJ GEC Marconi Materials Technology Schematics 5250 30GHz transistor trench TEOS oxide layer INTERMETal diode
Text: Process HJ: A 30 GHz NPN and 20 GHz PNP Complementary Bipolar Process for High Linearity RF Circuits. M C Wilson, P H Osborne, S Nigrin, S B Goody, J Green, S J Harrington, T Cook, S Thomas, A J Manson and A Madni Mitel Semiconductor Cheney Manor, Swindon, Wiltshire, SN2 2QW, U.K.
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20GHz,
TRANSISTOR 30GHZ
"vlsi technology" abstract for
Marconi Optical Components
Bipolar HJ
GEC Marconi Materials Technology
Schematics 5250
30GHz transistor
trench TEOS oxide layer
INTERMETal diode
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DUSLIC
Abstract: code for echo SICOFI-4 c2ku
Text: Integrated Digital Line CODEC Architectures: A Tutorial Review Manish Bhardwaj Telecom Devices Signal Processing and Control Division Microelectronics Design Center Infineon Asia Pacific 168 Kallang Way Singapore 349253. e-mail: manish.bhardwaj@infineon.com
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DUSLIC
code for echo
SICOFI-4
c2ku
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bsim3
Abstract: bsim3 circuit model Tech MOS Technology bsim3 model ESSDERC-98 gilbert cell sum harmonicbalance
Text: A Large Signal Non-Quasi-Static MOS Model for RF Circuit Simulation A.J. Scholten, L.F. Tiemeijer, P.W.H. de Vreede and D.B.M. Klaassen Philips Research Laboratories, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands Phone: +31-40-2742723; Fax: +31-40-2743390; E-mail: andries.scholten@philips.com
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Abstract: "vlsi technology" abstract for split-gate flash
Text: Endurance Characteristics of SuperFlash Memory Xian Liu*, Viktor Markov, Alexander Kotov, Tho Ngoc Dang, Amitay Levi Silicon Storage Technology, Inc., 1171 Sonora Court, Sunnyvale, CA94086, USA Ian Yue, Andy Wang, and Rodger Qian SST China, Ltd., Bldg. 24, No.115, Lane 572, Bibo Road, Zhangjiang Hi-Tech Park, Shanghai, 201203, P.R. China
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tunnel diodes
Abstract: 1E-18 injector tunnel detector ed 39
Text: Tunneling Phenomenon in SuperFlashâ Cell A.Kotov, A.Levi, Yu.Tkachev, and V.Markov Silicon Storage Technology Inc., 1171 Sonora Court, Sunnyvale, CA 94086, Tel. 408 522-7350, akotov@sst.com Abstract––An extensive investigation of interpoly oxide conduction (erase) mechanism for SuperFlash cell is
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Abstract: No abstract text available
Text: Freescale Semiconductor, Inc. MOTOROLA Order Number: AN1405/D SEMICONDUCTOR TECHNICAL DATA Rev 1, 09/2001 AN1405 ECL Clock Distribution Techniques Prepared by: Todd Pearson ECL Applications Engineering Abstract This application note provides information on system design
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Abstract: TRANSISTOR 30GHZ "vlsi technology" abstract Bipolar HJ 30GHz transistor trench TEOS oxide layer complementary npn-pnp Schematics 5250 SiGe PNP transistor high gain PNP RF TRANSISTOR
Text: A New Complementary Bipolar Process featuring a Very High Speed PNP. M C Wilson, P H Osborne, S Nigrin, S B Goody, J Green, S J Harrington, T Cook, S Thomas and A J Manson. Mitel Semiconductor Cheney Manor, Swindon, Wiltshire, SN2 2QW, U.K. Abstract This paper introduces "Process HJ" a
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20GHz
30GHz,
"vlsi technology" abstract for
TRANSISTOR 30GHZ
"vlsi technology" abstract
Bipolar HJ
30GHz transistor
trench TEOS oxide layer
complementary npn-pnp
Schematics 5250
SiGe PNP transistor
high gain PNP RF TRANSISTOR
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bit-slice
Abstract: No abstract text available
Text: Challenges of CAD Development for Datapath Design Tim Chan, Design Technology, Intel Corp. Amit Chowdhary, Design Technology, Intel Corp. Bharat Krishna, Design Technology, Intel Corp. Artour Levin, Design Technology, Intel Corp. Gary Meeker, Design Technology, Intel Corp.
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QUANTUM CAPACITIVE
Abstract: floating-gate 4156C flash "high temperature data retention" mechanism split-gate flash quantum dot
Text: Detection of Single-Electron Transfer Events and Capacitance Measurements in Submicron Floating-Gate Memory Cells Yuri Tkachev and Alexander Kotov Silicon Storage Technology, Inc. Sunnyvale, USA e-mail: ytkachev@sst.com Abstract—A simple technique for monitoring floating gate
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0-23A
QUANTUM CAPACITIVE
floating-gate
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flash "high temperature data retention" mechanism
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quantum dot
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wavelet transform
Abstract: wavelet power system TMS320C40 abstract on RTOS and multitasking Daubechies filter integer "frame grabber"
Text: DSPS Fest ’99 An Integer Wavelet Transform, Implemented on a Parallel TI TMS320C40 Platform Page 1 AN INTEGER WAVELET TRANSFORM, IMPLEMENTED ON A PARALLEL TI TMS320C40 PLATFORM Francis Decroos1,2, Peter Schelkens1,2, Gauthier Lafruit2, Jan Cornelis1, Francky Catthoor2,3
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TMS320C40
B-1050
B-3001
Shap93]
SPRU96]
TMS320C40
Swel95]
Thre95]
wavelet transform
wavelet power system
abstract on RTOS and multitasking
Daubechies filter integer
"frame grabber"
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MC10E111
Abstract: MPC973 10H645 AN1405 E211
Text: Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order Number: AN1405/D Rev 1, 09/2001 ECL Clock Distribution Techniques AN1405 Prepared by: Todd Pearson ECL Applications Engineering Abstract This application note provides information on system design
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MPC973
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hot electron devices
Abstract: igfet sonos SST superflash Dual-Gate Mosfet electric field permittivity DSASW0037374 superflash sst
Text: IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 3, MARCH 2003 809 An Analytical Model for Optimization of Programming Efficiency and Uniformity of Split Gate Source-Side Injection Superflash Memory Huinan Guan, Member, IEEE, Dana Lee, Member, IEEE, and G. P. Li
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Abstract: No abstract text available
Text: 4. Precautions for 1C Application 1 Absolute maximum ratings This value varies with the amount of 1C integration in package types. The maximum ratings for semiconduc tor devices are normally specified by “ absolute maximum ratings" The values shown in the maximum ratings table must
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JIS-C-7022
Abstract: No abstract text available
Text: 4. 1 Precautions for 1C Application Absolute m axim um ratings A g en eral exam ple on the relation with Absolute M axium Ratings. The maximum ratings for semiconductor devices are normally specified by “ absolute maximum ratings” . The values shown in the
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Abstract: No abstract text available
Text: 4. 1 Precautions for 1C Application Absolute m axim um rating s The m axim um ratings fo r sem iconductor devices are norm ally specified by “ absolute maximum ratin gs” . The values shown in the maximum ratings table m ust never be ex ceeded even fo r a moment.
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