000117B Search Results

ROEderstein EB GPF capacitors

Contextual Info: ROEDERSTEIN ELECTRONICS E3E D 7flElbS4 000117b b • A-05-11-01 Axial Electrolytic Capacitors etched Electrodes with Axial Leads, Bipolar Style Special style designed for operation with changing polarity or with pure AC, Operating temperature range: - 4 0 . 85°C 105°C

ROEderstein EB GPF capacitors

Abstract: Roederstein EBU EBU GPF Roederstein EG Roederstein EB EG Roederstein ROEDERSTEIN EG capacitors Roederstein Electronics EB20 gpf capacitors
Contextual Info: ROEDERSTEIN ELECTRONICS S3E D 70211324 000117b A—05—11—01 b Roederstein Axial Electrolytic Capacitors etched Electrodes with Axial Leads, Bipolar Style Special style designed for operation with changing polarity or with pure AC. Operating temperature range:

z25a

Abstract: AK2391 Q106 Q110
Contextual Info: ASAHI KASEI [AK2391] The AK2391 is a band limiting filter for n /4 shift QPSK modulation of Personal Handy phone System PHS in Japan. The AK2391 is compliant with Personal Handy phone System standard of RCR in Japan. The AK2391 consists of a Sum logic, Root Nyquist-Roll-offfilters

LM78A

Abstract: LM7805-TO d178c lm7805 5A 17800 LM7812 3 ampere LM7808 LP 7608 OF LM7812 CT1R
Contextual Info: PCI LM 7800 Series 3-Term inal Fixed Voltage Regulators Semiconductor [t h r e e -t e r m i n a l These voltage p o s it iv e v o l t a g e r e g u l a t o r s regulators are monolithic compensation. With adequate heatsinking they can integrated circuits designed as fixed-voltage regulators

Contextual Info: Embedded Controller Features • PowerPC RISC CPU core and instruction set architecture • Pipelined CPU core runs at up to 4X the external bus clock rate • Separate instruction cache and write-back/ write-through data cache, both two-way setassociative

Contextual Info: /T T ^ 7 # S G S 'T H O M S O N R 9 D @ [g iL i(Ë T J ls i© R !lD (g S S T 9 5 0 2 0 SERIAL ACCESS SPI BUS 2K (256 x 8 EEPROM • ■ ■ ■ ■ ■ 100,000 ERASE/WRITE CYCLES 40 YEARS DATA RETENTION SINGLE 4.5V to 5.5V SUPPLY VOLTAGE SPI BUS COMPATIBLE SERIAL INTERFACE

Contextual Info: CDB Device Cell Delineation Block TXC-05150 DATA SHEET Preliminary DESCRIPTION ATM cell delineation per ITU 1.432 ATM cell rate adaptation Selectable cell output: FIFO, SARA, and UTOPIA Universal Test & Operations Physical Interface for ATM Identifies OAM F4 cells and non-user cells

MIL-C-55681

Abstract: hf 224 capacitor 07734CH
Contextual Info: & - O S - 0 5 'C r > • ATC 900 C Series X7R Ceramic RF Power Multilayer Capacitors Case C Size .250" x .250" Capacitance Range 0.01 MFd to 1 MFd Low ESR/ESL Mid-K Rugged Construction High Reliability m f t ELECTRICAL AN D MECHANICAL ATC, the industry leader, is announcing new improved ESR/ESL

Contextual Info: S ta n d a r d P r o d u c t I I / PMC-Sierra, Inc. 1 ^» ISSUES PM 5344 SPTX SONET/SDH PATH TERMINATING TRANSCEIVER FEATURES • Monolithic SONET/SDH Path Terminating Transceiver that terminates the path overhead of one or three STS-1 AU3 paths or a single STS-3c (AU4) path.

Contextual Info: ANALOGIC CORP IS 0816970 ANALOGIC DE| □ fllbcl?D □□□1175 7 | CORP 15C D ,T-51-07-01 01175 M P2316 UNIVERSAL, FLOATING INRUT SELF-POWERED,'PROGRAMMABLE GAIN ANALOG ICONVERTER-PROCESSOR Patented see below DESCRIPTION The MP2316 is a universal, flo a tin g Input, self-powered, program ­

TR-NPL-000275

Abstract: chn 825
Contextual Info: t C E U O N MF TRUNK RECEIVERS & TRANSMITTERS E M-986-1R2 & -2R2 MF Transceivers Teltone M-986-1R2 and -2R2 MFC Transceivers contain all the logic necessary to transmit and receive CCITT R2F forward and R2B (backward) multifrequency signals on one integrated circuit (IC). M-986-1R2 is a single-channel ver­

Contextual Info: i L Y 6 Large Capacitance Aluminum Electrolytic Capacitors S eries LY6 S crew Term inal, M iniaturized, High R ipple C apacito rs • Reduced in outline sizes by one or two sizes than conventional LY5, LYZ Series. • Higher ripple by 10 to 20% than conventional LY5, LYZ Series.

Contextual Info: * SYNERGY ULTRA-HIGH-SPEED 64-WORD x 18-BIT FIFO SEMICONDUCTOR PRELIMINARY SY69167 SY69267 DESCRIPTION FEATURES • System clock speeds to 200MHz ■ User-selectable bandwidth — one read or one write operation each clock cycle ■ Selectable O VERFLOW and UNDERFLOW Interrupts