000473B Search Results

V9103

Abstract: HV9100 HV9100C HV9100P HV9100PJ HV9101P HV9101PJ HV9102 HV9102C HV9102P
Contextual Info: ï S u p e r te x in c HV9100 HV9101 HV9102 HV9103 . High-Voltage Switchmode Controllers with MOSFET Ordering Information Min +V„ Max MOSFET Switch Feedback Voltage Max Duty Cycle b v d83 Package Options ^DS OH 14 Pin Plastic DIP 14 Pin Ceramic DIP 20 Pin Plastic PLCC

glc556

Abstract: G4736 lg controller circuit diagram OR-GATES Lg Prime 3b game controller chip prime 3b
Contextual Info: @ LG Semicon. Co. LTD. Description Pin Configuration GLC560 is an integrated chip of two timers, two ORgates, control signal buffers and game data buffers. It can support one game controller without any additional TTL devices. Thus, it offers simple solution to the Super I/O card. Game port logic

Contextual Info: Lattice GAL16LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic ; Semiconductor I Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

transistor tt 2170

Abstract: TT 2170 30014 SOt23-5 footprint wave soldering EL2170C EL2170CN EL2170CS EL2176C EL2270C EL2276C
Contextual Info: f c lllt f P f E L 2 I 7 0 C / E L 2 2 7 0 C / E L '2 4 7 0 C TO WHz 1 m 1 'u r n n t Wtulf b m lb a vk A m pfifitri* HiGH PERFORMANCEANALOGINTEGRATEDCtàCUfTS . Features General Description • Single (EL2170C , dual (EL2270C) an d quad (EL2470C) topologies

X9312

Abstract: 111417
Contextual Info: A p p lic a tio n N o te s A V A I L A B L E AN42 ♦ AN44-48 « AN50 • AN52 « AN53 • AN71 • AN73 Terminal Voltage OV to +15V, 100 Taps X9312 E2POT Nonvolatile Digital Potentiometer FEATURES DESCRIPTION • Compatible with X9C102/103/104/503 • Low Power CMOS

Contextual Info: F L E X 10K Embedded Programmable Logic Family June 1996, ver. 2 Data Sheet Features. P re lim in a ry In fo rm ation Table 1. FLEX 10K Device Features Feature EPF10K10 EPF10K20 EPF10K30 EPF10K40 EPF10K50 EPF10K70 EPF10K100 Typical gates logic & RAM 10,000

Contextual Info: Philips Sem iconductors Product specification 7 H V D U A L I T Y T E C H N O L O G I E S C0 RP S7E D 74fc>bfl51 000472*1 7fi7 • 3 T Y FEATURES • A pin distance of 10.16 mm • An external clearance of 9.6 mm mimimum and an external creepage distance of 8 mm

loadable 4 bit counter

Contextual Info: Lattice ispLSI and pLSI 6192 ; Semiconductor I Corporation High Density Programmable Logic with Dedicated Memory and Register/Counter Modules — 96 I/O Pins with Input Registers — Security Cell Prevents Unauthorized Design Copy­ ing Features • A FAMILY OF HIGHLY INTEGRATED, CELL-BASED,

Contextual Info: S ta n d a r d P r o d u c t PMC I PMC-Sierra, Inc. I / 1 ^ * ISSUE 4 P M 8313D 3M X M13 MULTIPLEXER FEATURES • Integrates a full featured M13 multiplexer and DS-3 framer in a single monolithic device. • Supports the M23 or C-bit parity DS3 formats. • Supports the M12 or G.747 formats allowing DS1 or E1 signals to be multiplexed

ma 8920

Abstract: 750PEF10 750PEF40 NI-11
Contextual Info: INTERNATIONAL RECTIFIER / qcc / ct 4855452 INTERNATIONAL RECTIFIER in D e | 4ASS452 000473M b Data Sheet No. PD-3.065 49C 04734 D INTERNATIONAL RECTIFIER I R 1180A RMS Fast Turn-Off Hockey Puk Thyristors 750PEF SERIES Description Th e 7 5 0 P E F series o f fast tu r n -o ff thyristors use centre