00PIN Search Results

Contextual Info: In te g ra te d D e v ile T e c h n o lo g y , l i e . HIGH-SPEED 64K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS PRELIMINARY IDT707288S/L FEATURES: DESCRIPTION: • 6 4 K x 16 B ank-Sw itchable D ual-P orted S R A M Architecture - Four independent 16K x 16 banks

NSf39

Abstract: IR 0251 CY7C024 CY7C0241 CY7C025 CY7C0251 017L
Contextual Info: fax id: 5206 CY7C024/0241 CY7C025/0251 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • True D u al-P o rted m em o ry ce lls w h ich allow s im u ltan eo u s reads of th e s a m e m e m o ry location • 4K x 16 o rg an iza tio n C Y 7 C 02 4

Contextual Info: IBM0317329N IBM0317329P Advance 512K x 32 Synchronous Graphics RAM Features • Single 3.3V + 0.3 • Fully synchronous; all signals registered on pos­ itive edge ot system clock • 100-pin LQFP 0.65mm lead pitch • Internal pipelined operation; column address

cx 20192

Abstract: MPS A56 transistor CHIP T405C P ic cir 2272 IC LM 7812 Motorola LSC microcontroller LSC series Microcontroller by MOTOROLA Nippon capacitors 802ms abv 1000 inverter
Contextual Info: MC68HC11KG4/D MC68HC11KG4 TECHNICAL DATA M MOTOROLA INTRODUCTION PIN DESCRIPTIONS CPU CORE: AND INSTRUCTION SET OPERATING MODES AND ON-CHIP MEMORY REESETS AND INTERRUPTS PARALLEL INPUT/OUTPUT SERIAL COMMUNICATIONS INTERFACE SERIAL PERIPHERAL INTERFACE

Contextual Info: fax id: 5015 •vvrMWW>>>>>>>>wwvi CY7C9335 SMPTE-259M/DVB-ASI Descrambler/Framer-Controller Features • Fully compatible with SMPTE-259M-BCD — SMPTE-125M com pliant for 4:2:2 component video — SMPTE-244M com pliant for 4fsc composite video • Fully compatible with DVB-ASI

Contextual Info: • V* CY7C008/009 CY7C018/019 . <wiwy 64K/128K x 8/9 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Features • True Dual-Ported memory cells which allow simulta­ neous access of the same memory location • 64K x 8 organization CY7C008

2930D

Contextual Info: fax id: 1108 CY7C1338 :/ C Y P R E S S 128K X 32 Synchronous-Flow-Through 3.3V Cache RAM Features Functional Description • S u p p o rts 117-MHz m ic ro p ro c e s s o r cache s y s te m s w ith zero w a it states • 128K by 32 co m m o n I/O • Low S ta n d b y Pow er 1.65 mW, L v e rs io n

Contextual Info: fax id: 1110 CY7C1344 :/ C Y P R E S S 64K x 36 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • S u p p o rts 1 1 7 -M H z m ic ro p ro c e s s o r cache s y ste m s w ith zero w a it states • 64K by 36 co m m on I/O • Low S ta n d b y Pow er 1.65 mW, L ve rs io n

mg802c256q

Abstract: G802C256
Contextual Info: <♦ M G802C256 Ultra Low Latency, High Performance M o Sys’ 256Kx32 SGRAM Preliminary Inform ation !g§|oooooooooo|f Features DQ3_1 VccQr-12 DQ4 : 3 DQ5c: 4 VSSQ- □ 5 DQ6! 13 DQ7i 17 VccQ! 18 DQ16:- y DQ17 J 1U VssQ! I 11 DQ18: 12

UPD780206GF-xxx-3BA

Contextual Info: DATA SHEET / MOS INTEGRATED CIRCUIT jU PD 7 8 0 2 0 4 , 7 8 0 2 0 5 , 7 8 0 2 0 6 , 7 8 0 2 0 8 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The ¿¡PD780204, 780205, 780206, and 780208 microcontrollers are the products of ¿¡PD780208 subseries in 78K/0 series, and incorporate many hardware peripherals such as an FIP controller/driver, 8-bit resolution A/D

alien h3

Abstract: epm7192s pin
Contextual Info: includes MAX 7000E& MAX 700OS M AX 7000 Programmable Logic Device Family July ^898, ver. 5.03 Features . . . S8 88 £8 S8 SSS H igh-perform ance, EEPROM -based p rogram m able logic devices PLDs based on second-generation M ultiple A rray MatriX (MAX)

nec ir receiver

Abstract: 16 bit prbs transmitter 99532 OD-J8240 OD-J8241 NEC IR optical distributed 16-DEMUX NEC power supply
Contextual Info: OD-J8240/OD-J8241 10-Gb ps Op tical Tran sceiver w i th 16-ch an ne ls MUX / FEATURES Designed for SONET /SDH /ATM Systems OC-192 SR-2[20km], IR-2[40km] compliant cooled EML transmitter and pin-PD receiver 16:1-MUX/1:16-DEMUX Integrated 622.08-Mbps LVDS Input/Output interface

RC266

Abstract: RS -12V SDS RELAY RSL -12V SDS RELAY MD127 RS -24V SDS RELAY txal HB 541 RELAY PCB DPDT 4c sds relays TXAL 386 B
Contextual Info: RC288ACÌ and RC288ACL * Rockwell RC288ACi and RC288ACL Integrated V.34 Data/V.17 Fax/Voice Modem Device Set Family INTRODUCTION FEATURES The Rockwell RC288ACi and R C288A CL integrated modem device set families support ultra high speed data and high speed fax operation in the US or world-wide over

351N

Contextual Info: Paradigm PDM34078 3.3V 32K x 32 Fast CMOS Synchronous Static RAM with Burst Counter and Output Register Features Description □ Interfaces directly with the x86, Pentium , 680X0 and PowerPC™ processors 100, 80, 66, 60, 50 MHz □ Single 3.3V power supply

Contextual Info: H ig h P e rfo rm a n ce •■ 32K X 32 ü AS7C33232 A S7C 33232F CMOS SRAM 3 2 K x j ¿ S y n c h ro n o u s burst SRAM Features • Organization: 3 2 ,7 6 8 w o rd s x 32 bits • A synchronou s ou tp u t enable control • Fully syn ch ron ou s p ip e lin ed op eration

Contextual Info: ♦ _ M G 8 Q 2 C 5 1 2 U l t r a L o w L a t e n c y , H ig h P e r f o r m a n c e 51 2 K X 3 2 S G R A M M o Sys PR ELIM IN A R Y IN FO R M A TIO N a O _ o 3 „ n S C J S a a p o o o o o o o o o o j n a a i d > û û > z z z z z z z z z z > û û ;

78058T

Abstract: 78058G IC-8884 LED DRIVER ana 618 D780024 78055G D78P054
Contextual Info: DATA SHEET / MOS INTEGRATED CIRCUIT /JPD78052,78053,78054,78055,78056,78058 8-BIT SINGLE-CHIP MICROCONTROLLER D E S C R IP T IO N The /XPD78052,78053,78054,78055,78056 and 78058 are the /iP D 78054 subseries products of the 78K/0 series. 8-bit resolution A/D converter, 8-bit resolution D/A converter, tim er, serial interface, real-time output port and

led clock circuit diagram

Abstract: CY2252PVC-1 MF423
Contextual Info: fax id: 3522 CY2252 CYPR Mobile Pentium Processor Compatible Clock Synthesizer/Driver Features Multiple clock outputs to meet requirements of mobile systems using Pentium™ processors — Five CPU clocks @ 66.66 MHz, 60.0 MHz, 50.0 MHz or 33.33 MHz pin selectable

XZ132

Abstract: F10K25 Clock Management with ClockLock & ClockBoost Features White Paper
Contextual Info: FLEX 10K ,u r v Includes R JE X 10 K A Embedded Programmable Logic Family May 1999, ver. 4 Features. Data Sheet • ■ ■ The industry's first embedded programmable logic device PLD family, providing System-on-a-Programmable-Chip integration Embedded array for implementing megafunctions, such as

m524

Abstract: LTM-185 AT01
Contextual Info: CHAPTER 1 OUTLINE /iPD78064 Subseries 1.1 O Features On-chip high-capacity ROM and RAM Type Part N u m b e r'\^ Note Data Memory Program Memory (ROM) Internal High-Speed RAM fiPD78062 16 Kbytes 512 bytes ;iPD78063 24 Kbytes 1024 bytes ¿1PD78064 32 Kbytes

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT 16-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The ¿¡PD784927 is a member of the NEC 78K/IV Series of microcontrollers equipped with a high-speed 16-bit CPU for VCR software servo control. The ¿¡PD784927 contains many peripheral hardware units ideal for VCR control, such as a multi-function timer unit

ST 1803 DHL

Abstract: 1103NSL
Contextual Info: Preliminary • Data Sheet Integrator SeriesFPGAs - 40MX and 42MX Families Features • S upported by A ctel Designer Series developm ent system w ith in te rfa c e s to popular design e n viro n m e n ts such as Cadence, E xem plar, 1ST, M e n to r G raphics, Synopsys,

Contextual Info: fax id: 1112 CY7C1346 : / C Y P R E S S 64K X 36 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 m W s ta n d b y p o w er (f=0, L versio n ) • S u p p o rts 10 0 -M H z bus fo r P en tiu m and Pow erPC o p e ratio n s w ith zero w a it sta tes

C3157

Contextual Info: fax id: 6139 CY7C374Ì :/ C Y P R E S S UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins The CY7C374i is an In-System Reprogrammable Complex