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    Abstract: No abstract text available
    Text: m data Digitally Programmable delay DelayM Units (6-Bit E™ y i 06H4H devices. inc. C L Interfaced Specifications: Test Conditions • Input signal requirem ent: ECL logic ■ In p u t p ulse-w idth: ■ O utput fan-out: ECL loads ■ D elay variation: M o n o to n ic in one d ire c tio n


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