08FEB2006 Search Results

Contextual Info: T H I S DRAWING IS U N P U B L IS H E D . R E L E A S E D F OR P U B L I C A T I O N 2003 LOC COR Y R I G HT 2003 LTR 17.9±0.7 L1 10±0.1 A OnI O 'S N '* n I . DO < N a R E V I S I ONS D I ST A BY TYCO E L E C T R O N I C S C O R P O R AT IO N A LL R IG H T S R E S E R V E D .

M48T37V

Abstract: M48T37Y M4T28-BR12SH M4T32-BR12SH SOH44
Contextual Info: M48T37Y M48T37V 5.0 or 3.3 V, 256 Kbit 32 Kbit x 8 TIMEKEEPER SRAM Features • Integrated ultra low power SRAM, real-time clock, power-fail control circuit, and battery ■ Frequency test output for real-time clock software calibration ■ Automatic power-fail chip deselect and WRITE

Contextual Info: STM6315 Open drain microprocessor reset Features • Low supply current of 1.5µA typ ■ ±1.8% reset threshold accuracy (25°C) ■ Guaranteed RST assertion down to VCC = 1.0V ■ Open drain RST output can exceed VCC ■ Power supply transient immunity

M48T37V

Abstract: M48T37Y M4T28-BR12SH M4T32-BR12SH SOH44 AI009
Contextual Info: M48T37Y M48T37V 5.0 or 3.3 V, 256 Kbit 32 Kbit x 8 TIMEKEEPER SRAM Features • Integrated ultralow power SRAM, real-time clock, power-fail control circuit, and battery ■ Frequency test output for real-time clock software calibration ■ Year 2000 compliant

JESD97

Abstract: STM6315 AI11166
Contextual Info: STM6315 Open drain microprocessor reset Features • Low supply current of 1.5µA typ ■ ±1.8% reset threshold accuracy (25°C) ■ Guaranteed RST assertion down to VCC = 1.0V ■ Open drain RST output can exceed VCC ■ Power supply transient immunity

STX-RLINK

Abstract: STX-RLINK stm32 RLINK st7 RLink RLink jtag pin RLINK st7 stm8 STM32 stm32 10 RLink arm jtag upsd
Contextual Info: STX-RLINK Raisonance’s in-circuit debugger/programmer for STM8, ST7, µPSD, STM32, STR7 and STR9 Data Brief Features • In-circuit debugging and programming ■ Connection to application board via JTAG standard, or ST SWIM or ICC connection ■ USB interface to host PC

Resistance CMS-1206

Abstract: 1N4007/1n4007 sod 1206 MMB0207 heat sink AS-Interface circuit diagram 1N4007 cms EC61131-2 AN1608 CHARACTERISTICS DIODE 1N4007 opto coupler array opto coupler ild213
Contextual Info: AN2482 Application note PCLT Programmable current limited termination Introduction The purpose of this document is: • To describe the PCLT behavior (refer also to data sheet) ■ To give useful recommendations to achieve robust PCLT designs regarding EMI test

triacs bt 16 600v

Contextual Info: BTA20 20 A Snubberless Triacs Datasheet  production data Features • IT RMS = 20 A ■ VDRM, VRRM = 600 and 700 V ■ IGT (Q1) (max) = 35 and 50 mA A2 G A1 Description The BTA20 Triacs use high performance glass passivated chip technology. The Snubberless

Contextual Info: STX-RLINK Raisonance’s in-circuit debugger/programmer for STM8, ST7, STM32, STR7 and STR9 Data brief Features • In-circuit debugging and programming ■ Connection to application board via JTAG, SWD, ST SWIM or ICC interface ■ USB interface to host PC

M48T37V

Abstract: M48T37Y M4T28-BR12SH M4T32-BR12SH SOH44
Contextual Info: M48T37Y M48T37V 5.0 or 3.3V, 256 Kbit 32 Kbit x 8 TIMEKEEPER SRAM Features • Integrated ultra-low power SRAM, real time clock, power-fail control circuit, and battery ■ Frequency test output for real time clock software calibration ■ Year 2000 compliant

STX-RLINK

Abstract: STX-RLINK stm32 RLINK st7 stm8 ARM STM8 configure STM32 RLink jtag pin
Contextual Info: STX-RLINK Raisonance’s in-circuit debugger/programmer for STM8, ST7, STM32, STR7 and STR9 Data brief Features • In-circuit debugging and programming ■ Connection to application board via JTAG, SWD, ST SWIM or ICC interface ■ USB interface to host PC

strataflash 512 p30

Abstract: Migration Guide for Intel StrataFlash Memory J 3066* intel
Contextual Info: Intel StrataFlash Embedded Memory P30 Family Datasheet Product Features High performance • Security — 85 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to• 64 user-programmable OTP bits

BT 130 triac

Abstract: triacs bt 16 600v BTA20 TRIAC BTA 28 triac BT 130 TRIAC BTa 12 600 BW application note TRIAC BTA-SERIES TRIAC BTa 16 600 BW application note BTA 12 700BW BTA20-700CW
Contextual Info: BTA20 Series 20A TRIACS SNUBBERLESS Table 1: Main Features A2 Symbol Value Unit IT RMS 20 A VDRM/VRRM 600 and 700 V IGT (Q1) (max) 35 and 50 mA G A1 DESCRIPTION The BTA20 BW/CW triac family are high performance glass passivated chips technology. The snubberless concept offer suppression of RC

Contextual Info: BTA20 20 A Snubberless Triacs Datasheet  production data Features • IT RMS = 20 A ■ VDRM, VRRM = 600 and 700 V ■ IGT (Q1) (max) = 35 and 50 mA A2 G A1 Description The BTA20 Triacs use high performance glass passivated chip technology. The Snubberless