09272 Search Results

serializer guide

Abstract: SLLS526E 8208 ns
Contextual Info: SN65LV1021/SN65LV1212 10-MHz TO 40-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526E – FEBRUARY 2002 – REVISED SEPTEMBER 2002 D D D D 100-Mbps to 400-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 40-MHz System Clock Pin-Compatible Superset of NSM

E89556

Contextual Info: bq48SH-28x6 SLUS508A – DECEMBER 2001 REVISED – JUNE 2002 SNAPHAT WITH INTEGRATED BATTERY AND CRYSTAL FEATURES D Detachable Unit Allowing Replacement D Integrated 6-pF Watch Crystal for Real-Time D D D D DESCRIPTION Clock Operation Integrated Lithium Coin Cell for Nonvolatile

TMS320Lx240x 3.3-V DSPs

Abstract: TMS320Lx240x 230Q1
Contextual Info: SN65HVD230Q-Q1 SN65HVD231Q-Q1 SN65HVD232Q-Q1 SGLS117C – JUNE 2001 – REVISED JUNE 2002 3.3-V CAN TRANSCEIVERS D Low-Current SN65HVD231Q Sleep Mode FEATURES D Qualification in Accordance With AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control Can

Contextual Info: SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 D D D SN54ALS374A, SN54AS374 . . . J PACKAGE SN74ALS374A, SN74AS374 . . . DW OR N PACKAGE TOP VIEW

Contextual Info: SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004E – OCTOBER 1987 – REVISED APRIL 1994 • • • • SN54BCT240 . . . J OR W PACKAGE SN74BCT240 . . . DB, DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

SLVA103

Contextual Info: TPS2390 TPS2391 SLUS471B – JUNE 2002 – REVISED JUNE 2002 SIMPLE -48ĆV HOT SWAP CONTROLLER FEATURES D Wide Input Supply Range: –36 V to –80 V D Transient Rating to –100 V D Programmable Current Limit D Programmable Current Slew Rate D Enable Input EN

Contextual Info: SN54ALS323, SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS SDAS267A – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • • description These 8-bit universal shift /storage registers feature multiplexed input/output I/O ports to

Contextual Info: SN54ALS04B, SN54AS04, SN74ALS04B, SN74AS04 HEX INVERTERS SDAS063B – APRIL 1982 – REVISED DECEMBER 1994 SN54ALS04B, SN54AS04 . . . J PACKAGE SN74ALS04B, SN74AS04 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip

Contextual Info: SN54ALS169B, SN54AS169A, SN74ALS169B, SN74AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS125B – MARCH 1984 – REVISED DECEMBER 1994 • • • • • Fully Synchronous Operation for Counting and Programming Internal Carry Look-Ahead Circuitry for

DESIGN WITH UC3875

Abstract: UC3875 slope in uc3875 phase shifted zero voltage UC1875
Contextual Info: application INFO available UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 Phase Shift Resonant Controller FEATURES DESCRIPTION • Zero to 100% Duty Cycle Control The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect

Contextual Info: SN54ALS273, SN74ALS273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SDAS218A – APRIL 1982 – REVISED DECEMBER 1994 • • • • • SN54ALS273 . . . J PACKAGE SN74ALS273 . . . DW OR N PACKAGE TOP VIEW Contain Eight Flip-Flops With Single-Rail Outputs Buffered Clock and Direct-Clear Inputs

Contextual Info: SN64BCT244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS027A – FEBRUARY 1989 – REVISED JANUARY 1994 • • • • • DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers

Contextual Info: 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C – AUGUST 1987 – REVISED APRIL 1996 D D D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted

Contextual Info: SN74BCT2245 OCTAL TRANSCEIVER AND LINE/MOS DRIVER WITH 3-STATE OUTPUTS SCBS102B – FEBRUARY 1992 – REVISED APRIL 1994 • • • • DB, DW, OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per

ua723cn

Abstract: fairchild ua723 UA723C UA723 uA723 application note UA723 fairchild
Contextual Info: µA723 PRECISION VOLTAGE REGULATORS SLVS057D – AUGUST 1972 – REVISED JULY 1999 D D D D D D OR N PACKAGE TOP VIEW 150-mA Load Current Without External Power Transistor Adjustable Current-Limiting Capability Input Voltages up to 40 V Output Adjustable From 2 V to 37 V

Contextual Info: SN54ALS08, SN54AS08, SN74ALS08, SN74AS08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SDAS191A – APRIL 1982 – REVISED DECEMBER 1994 SN54ALS08, SN54AS08 . . . J PACKAGE SN74ALS08, SN74AS08 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip

10K07

Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

Contextual Info: UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP CURRENT-MODE PWM CONTROLLER SGLS134 – SEPTEMBER 2002 D Controlled Baseline D D D D D D D D D D D D D D D D – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C

Opto P 721

Abstract: toshiba 1943 02CZ27 opto 1128 02CZ5 opto 721 316 OPTO
Contextual Info: TOSHIBA {D IS CR E TE/OPTO} t? 9097250 TOSHIBA {DISCRETE/OPTO D Ì J ^ D T 7 2 5 0 OOD'ìEbfl 7 | ~ 67C 09268 CONSTANT VOLTAGE REGULATION APPLICATIONS. OT'll'Ol Unit In mm REFERENCE VOLTAGE APPLICATIONS. + <16 a.5-Q3 FEATURES i +0.2 5 1.6-ai s m dd +1 HO

Contextual Info: SN54ALS1034, SN54AS1034A, SN74ALS1034, SN74AS1034A HEX DRIVERS SDAS053B – APRIL 1982 – REVISED JANUARY 1995 ′AS1034A Offer High Capacitive-Drive Capability Noninverting Drivers Package Options Include Plastic Small-Outline D Packages, Ceramic Chip

Contextual Info: SN54ALS191A, SN74ALS191A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS210C – DECEMBER 1982 – REVISED JULY 1996 D D D D D Single Down / Up Count-Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load

Contextual Info: SLK2721 OC-48+FEC/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER WITH ENHANCED JITTER TOLERANCE SLLS532 – JUNE 2002 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Enhanced Jitter Tolerance Over SLK2701

Contextual Info: SN54279, SN54LS279A, SN74279, SN74LS279A QUADRUPLE S-R LATCHES SDLS093 – DECEMBER 1983 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543B – OCTOBER 1995 - REVISED JUNE 1996 D D D SN54AC374 . . . J OR W PACKAGE SN74AC374 . . . DB, DW, N, OR PW PACKAGE TOP VIEW 3-State Noninverting Outputs Drive Bus Lines Directly