0X703 Search Results

CY14B101LA-SZ45XI

Abstract: CY14B101LA-SZ25XI
Contextual Info: CY14B101LA CY14B101NA 1 Mbit 128K x 8/64K x 16 nvSRAM 1 Mbit (128K x 8/64K x 16) nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14B101LA) or 64K x 16 (CY14B101NA) ■ Hands off Automatic STORE on Power Down with only a Small

s3c46

Abstract: S3C4510B S3C4510 SDLC 8044 Transistor TEO 1279 diagram TCON resistor 270 ohm ARM7 Series 38109 0x303C
Contextual Info: S3C4510B 1 PRODUCT OVERVIEW PRODUCT OVERVIEW OVERVIEW Samsung's S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems. An integrated Ethernet controller, the S3C4510B, is designed for use in

A1600

Abstract: A2000 GPL168001A1 S200 S240 crystal 32768hz
Contextual Info: GPL168001A1 Confirmation Sheet V1.2 09/25/2009 Customer Date Project Title Code No. Project Description □2.7V ~ 3.6V CPU Working Voltage □2.7V ~ 3.6V I/O Voltage VDD CPU Operation Frequency LCD Configuration Clock control register: _ (Value written to 0x7007),

A1601

Abstract: GPL169121A DVR3200 DVR4800 GPL169128A S600 C18 libraries
Contextual Info: GPL169128A Confirmation Sheet V1.1 05/31/2007 Customer Date Project title Code No. Project description □ CPU working voltage 2.4V ~ 3.6V VDD & I/O voltage CPU Operation Frequency LCD Configuration Clock control register: _ (Value written to 0x7007),

A3600

Abstract: DVR3200 DVR4800 GPL169251A MS02 GPL16
Contextual Info: GPL169251A Confirmation Sheet V1.1 06/30/2009 Customer Date Project title Code No. Project description CPU working voltage □ 2.7V ~ 3.6V 47.9232MHz, 3 wait cycles (VDD) & I/O voltage □ *2.4V ~ 3.6V (44.2362MHz, 3 wait cycles or 47.9232MHz, 4 wait cycles)

ARM7 samsung

Abstract: S5N8947X 8309 o1m 147 ADSL Modem circuit diagram ADSL MODEM PROGRAMMING Samsung S ARM TAG 70M CRC-10 S5N8947
Contextual Info: S5N8947X MCU for ADSL/Cable Modem Revision 0.1 May. 23, 2000 SAMSUNG ELECTRONICS PROPRIETARY Copyright 1999-2000 Samsung Electronics, Inc. All Rights Reserved S5N8947 (ADSL/Cable Modem MCU) ELECTRONICS CONTENTS 1. GENERAL DESCRIPTION .4

interfacing ADC with 8086 microprocessor

Abstract: teaklite 3 instruction opcode MC86000 0.18-um CMOS Flash technology 8086-bus mc8600 I8086 teaklite DRAM 4416 LQPF 208 Package
Contextual Info: S5N8947 DATA SHEET GENERAL DESCRIPTION Samsung's S5N8947 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution. The S5N8947 is designed as 2-channel 10/100Mbps Ethernet controller for use in managed communication hubs and routers. The S5N8947 also provides ATM Layer SAR Segmentation and Reassembly

netxtreme programmer

Abstract: BCM5701 PG105R S6D0 netxtreme 57xx gigabit controller BCM5704 BCM5715 broadcom BCM5715C BCM5788/M mac 7a8 transistor
Contextual Info: Programmer’s Guide BCM57XX Host Programmer Interface Specification for the NetXtreme Family of Highly Integrated Media Access Controllers 57XX-PG105-R 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 01/29/08 BCM57XX

Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M)

Contextual Info: CY14B108L CY14B108N 8-Mbit 1024 K x 8/512 K × 16 nvSRAM 8-Mbit (1024 K × 8/512 K × 16) nvSRAM Features • Packages ❐ 44-/54-pin thin small outline package (TSOP) Type II ❐ 48-ball fine-pitch ball grid array (FBGA) Pb-free and restriction of hazardous substances (RoHS)

STK17TA8

Abstract: STK17TA8-R
Contextual Info: STK17TA8 128Kx8 Autostore nvSRAM With Real-Time Clock FEATURES DESCRIPTION • nvSRAM Combined With Integrated Real-Time Clock Functions RTC, Watchdog Timer, Clock Alarm, Power Monitor The Simtek STK17TA8 combines a 1Mb non-volatile static RAM (nvSRAM) with a full-featured real-time

TAA CAPACITOR

Abstract: CY14B101K CY14B101K-SP25XC CY14B101K-SP25XCT CY14B101K-SP25XI CY14B101K-SP25XIT
Contextual Info: CY14B101K 1 Mbit 128K x 8 nvSRAM With Real Time Clock Features Functional Description • Data integrity of Cypress nvSRAM combined with full featured Real Time Clock (RTC) ■ Watchdog timer ■ Clock alarm with programmable interrupts ■ Capacitor or battery backup for RTC

Contextual Info: HD Audio SoundMAX Codec AD1981HD FEATURES ENHANCED FEATURES 2 DAC channels: 16-, 20-, or 24-bit 2 ADC channels: 16- or 20-bit HD audio sample rates 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz, 44.1 kHz, 48 kHz Greater than 90 dB dynamic range S/PDIF output: 32 kHz, 44.1 kHz or 48 kHz, 16- or 24-bit

Contextual Info: NOIV1SN1300A, NOIV2SN1300A VITA 1300 1.3 Megapixel 150 FPS Global Shutter CMOS Image Sensor http://onsemi.com Features • • • • • • • • • • • • • • • • • • • • • • SXGA: 1280 x 1024 Active Pixels 4.8 mm x 4.8 mm Pixel Size

250210

Abstract: 10-PORT
Contextual Info: Intel IXF1110 10-Port Gigabit Ethernet Media Access Controller Preliminary Datasheet The Intel® IXF1110 is a 10-port Ethernet Media Access Controller MAC that supports IEEE 802.3 1000 Mbps applications. The device supports a System Packet Interface Level 4 Phase 2

tl3702

Abstract: incremental encoder Texas sin cos encoder schematic sin/cos encoder Texas QEP Encoder 5V sin cos encoder rotary encoder schematic tl2425 texas instrument absolute position encoder Encoder/HEIDENHAIN
Contextual Info: Application Report SPRA496 TMS320F240 DSP-Solution for HighResolution Position with Sin/CosEncoders Martin Staebler Digital Signal Processoring Solutions Abstract This application report offers a solution for obtaining high-resolution position with sin/cosencoders using the Texas Instrument TIä TMS320F240 digital signal processor (DSP)

Contextual Info: PRELIMINARY CY14B116K/CY14B116M 16-Mbit 2048 K x 8/1024 K × 16 nvSRAM with Real Time Clock Features Functional Description • The Cypress CY14B116K/CY14B116M combines a 16-Mbit nvSRAM with a full-featured RTC in a monolithic integrated circuit. The nvSRAM is a fast SRAM with a nonvolatile element

Contextual Info: NOIV1SN2000A, NOIV2SN2000A VITA 2000 2.3 Megapixel 92 FPS Global Shutter CMOS Image Sensor http://onsemi.com Features • • • • • • • • • • • • • • • • • • • • • • WUXGA Resolution: 1920 H x 1200 (V) Format 4.8 mm x 4.8 mm Pixel Size

A9A12

Contextual Info: PRELIMINARY CY14B101KA/CY14B101MA 1 Mbit 128K x 8/64K x 16 nvSRAM with Real Time Clock Features • ■ 1-Mbit nvSRAM ❐ 20 ns, 25 ns, and 45 ns access times ❐ Internally organized as 128K x 8 (CY14B101KA) or 64K x 16 (CY14B101MA) ❐ Hands off automatic STORE on power down with only a small

cy14b108n

Contextual Info: PRELIMINARY CY14B108L, CY14B108N 8 Mbit 1024K x 8/512K x 16 nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally organized as 1024K x 8 (CY14B108L) or 512K x 16 (CY14B108N) ■ Hands off Automatic STORE on power down with only a small

SSOP-48

Abstract: STK17TA8 STK17TA8-R STK17TA8-RF25
Contextual Info: STK17TA8 128k X 8 AutoStore nvSRAM with Real Time Clock Features Description • nvSRAM Combined with Integrated Real Time Clock Functions RTC, Watchdog Timer, Clock Alarm, Power Monitor ■ Capacitor or Battery Backup for RTC ■ 25, 45 ns Read Access and Read/Write Cycle Time

Contextual Info: PRELIMINARY CY14B104K, CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real Time Clock Features • Watchdog timer ■ 20 ns, 25 ns, and 45 ns access times ■ Clock alarm with programmable interrupts ■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16

RGMII version 1.2a specification

Abstract: f1010 RD34 IXF1010 249839 LED DIP2
Contextual Info: IXF1010 10-Port 100/1000 Mbps Ethernet Media Access Controller Preliminary Datasheet IXF1010 is a 10-port 100/1000 Mbps Ethernet Media Access Controller MAC that supports IEEE 802.3 100 and 1000 Mbps applications. The device supports a System Packet Interface

Contextual Info: CY14B116L/CY14B116N/CY14B116S CY14E116L/CY14E116N/CY14E116S PRELIMINARY 16-Mbit 2048 K x 8/1024 K × 16/512 K × 32 nvSRAM Features • ■ 16-Mbit nonvolatile static random access memory (nvSRAM) ❐ 25-ns, 30-ns and 45-ns access times ❐ Internally organized as 2048 K × 8 (CY14X116L),