0X824 Search Results

transistor marking WC 2C

Abstract: E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
Contextual Info: TMS320C6678 SPRS691E—November 2010—Revised March 2014 Multicore Fixed and Floating-Point Digital Signal Processor Check for Evaluation Modules EVM : TMS320C6678 1 TMS320C6678 Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x

Contextual Info: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz

m1 250c fuse

Abstract: at32uc3c em 234 stepper dtx 370 DTH block diagram lta 301 VT 546 Modem basic circuit diagram EIC 4021 shift registers 4050
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

GCM 38112

Abstract: Wifi to I2C ST ATUC3A4256S AT32UC3A3 dsp ssb modulation demodulation barcode reader using avr AT32UC3A64 ATUC3A3256 DesignWare Hi-Speed USB On-The-Go Controller AT32UC3A3256S
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

TMS320C6678ACYP

Abstract: TMS320C6678CYP TMS320C6678XCYP TMS320C6678CYPA TMS320C6678XCYPA
Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

DFSDM

Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static

GEIA-STD-00021-1

Contextual Info: TMS570LS20206-EP, TMS570LS20216-EP www.ti.com SPNS209 – JUNE 2012 TMS570LS Series 16/32-BIT RISC Flash Microcontroller Check for Samples: TMS570LS20206-EP, TMS570LS20216-EP 1 TMS570LS Series 16/32-BIT RISC Flash Microcontroller 1.1 Features 1 • The TMS570LS20206-EP and TMS570LS20216EP use the same silicon die as the TMS

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

TMS320TCI6608

Abstract: SPRS623A SPRS623B
Contextual Info: TMS320TCI6608 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

Contextual Info: AM5K2E04/02 Multicore ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

Contextual Info: 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

ATMEL 234

Abstract: how to derive sim 900 ARM926EJ-S AT91SAM ISO7816
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer

232cbe

Abstract: WJ-A35 GT-64010A R5000 GT64010
Contextual Info: Galileo Technology TM System Controller with GT-64010A Preliminary PCI Interface for R4XXX/ Revision 1.1 December 1996 R5000 Family CPUs NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Integrated system controller with PCI bus interface for

Nokia 3210

Abstract: nokia c5-03 str z 4267 G4ad7 4-20 mA converter modbus rs485 ascii protocols G4D32RS G4ODC5 nokia display c5-03 CRC16
Contextual Info: MISTIC PROTOCOL USER’S GUIDE Form 270-100823 — August, 2010 43044 Business Park Drive, Temecula, CA 92590-3614 Phone: 800-321-OPTO 6786 or 951-695-3000 Fax: 800-832-OPTO (6786) or 951-695-2712 www.opto22.com Product Support Services: 800-TEK-OPTO (835-6786) or 951-695-3080

031MF

Contextual Info: PM73122 AAL1GATOR-32 PRELIMINARY STANDARD PRODUCT DATASHEET PMC-1981419 ISSUE 4 32 LINK CES/DBCES AAL1 SAR PM73122 AAL1GATOR-32 ATM ADAPTATION LAYER 1 SEGMENTATION AND REASSEMBLY PROCESSOR-32 DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 4: JANUARY 2000

Contextual Info: GT-64060 IBBIBk « Galileo !»; Technology High-lntegration PCI Bridge/ Memory Controller P roduct Preview R evision 0.7 4/1/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with

ATMEL 910

Abstract: atmel910 SMC911 hsb 772 p interface bluetooth with AVR ptz decoder AC97 AT32AP7000 AVR32 rf mems switch
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

16Cxx

Abstract: p16c FP24.A16 P16CR84 75419 AN575 IEEE754 PIC16 PIC17 GA 88
Contextual Info: M AN575 IEEE 754 Compliant Floating Point Routines Author: Frank J. Testa FJT Consulting INTRODUCTION This application note presents an implementation of the following floating point math routines for the PICmicro microcontroller families: • • • •

SPRS691C

Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

6242E

Abstract: 4583 dual schmitt trigger 6242b la 4508 ic pin diagram R1100D121C AT91Bootstrap CS 5609 ARM926EJ-S ISO7816 5609 dec
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer