0XE180 Search Results

TMS320

Abstract: UCD9080 UCD9080RHBR UCD9080RHBT
Contextual Info: UCD9080 www.ti.com SLVS692A – SEPTEMBER 2006 – REVISED DECEMBER 2006 8-CHANNEL POWER SUPPLY SEQUENCER AND MONITOR FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • Telecommunications Switches Servers Networking Equipment

wd 969 usb

Abstract: SPEAR320-2 SD protocol SPEAr320 vxworks driver
Contextual Info: SPEAr320 Embedded MPU with ARM926 core, optimized for factory automation and consumer applications Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions on 102 shared I/Os.

schematic diagram mac audio mpx 4000

Abstract: M 57741 ADAU144x m 57746 57415 57814 ADAU1442 ADAU1445 ADAU1446 NJT4030P
Contextual Info: SigmaDSP Digital Audio Processor with Flexible Audio Routing Matrix ADAU1442/ADAU1445/ADAU1446 Preliminary Technical Data FEATURES I2C and SPI control interfaces Standalone operation Self-boot from serial EEPROM 4-channel, 10-bit auxiliary control ADC Multipurpose pins for digital controls and outputs

Contextual Info: CD00250129 Rev 2.1 IN APPROVAL PAGE A ft Embedded MPU with ARM926 core, flexible memory support, powerful connectivity features and human machine interface -D ra Technical Literature Alternate Identifier s Key process 16324 Product Development Dr ISO Definition

TMS320

Abstract: UCD9080 UCD9080RHBR UCD9080RHBRG4 UCD9080RHBT UCD9080RHBTG4
Contextual Info: UCD9080 www.ti.com SLVS692C – SEPTEMBER 2006 – REVISED JANUARY 2007 8-CHANNEL POWER SUPPLY SEQUENCER AND MONITOR FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • Single Supply Voltage: 3.3 V Low Power Consumption

MC33903S

Contextual Info: Freescale Semiconductor Technical Data Document Number: MC33903_4_5 Rev. 6.0, 4/2011 SBC Gen2 with CAN High Speed and LIN Interface 33903/ 33903/4/5 The 33903/4/5 is the second generation family of the System Basis Chip SBC . It combines several features and enhances present

7812 TO-3

Abstract: SPEAR310 4027 pin diagram SPEAr600 M25Pxxx LK 1628 spear3XX jtag 8bit nand flash upd programmable timer ST 7812
Contextual Info: SPEAr310 Embedded MPU with ARM926 core, flexible memory support, extended set of powerful connectivity features Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions multiplexed

intel 8203

Abstract: RTL 8188 82580 82575 0x1528 electromagnetic pulse kit INTEL 845 MOTHERBOARD CIRCUIT diagram foxconn ls 36 motherboard manual 8237 direct memory access controller 81217
Contextual Info: Intel 82580 Quad/Dual Gigabit Ethernet LAN Controller Datasheet LAN Access Division LAD FEATURES External Interfaces Provided: • Virtualization Ready: PCIe v2.0 (5Gbps and 2.5Gbps) x4/x2/x1; called PCIe in this document. • Enhanced VMDq1 support: •

AN511

Abstract: si4010
Contextual Info: A N 5 11 NVM P ROGRAMMING U TILITY U SER ’ S G UIDE 1. Purpose This document is a user guide for the NVM Programming Utility. The purpose of the utility is to prepare and burn user code and data into the non-volatile memory NVM of supported devices. This is a one time programmable

1117 1.8v

Abstract: TAG J3 136D diode 10-16 BLD 135D intel 945 motherboard schematic diagram transistor mps 9632 intel 82576 SFP 1-by-2 sdp31 ENCODER "Development Kit"
Contextual Info: Intel Ethernet Controller I350 Datasheet LAN Access Division LAD Features External Interfaces provided: Power saving features:  PCIe v2.1 (2.5GT/s and 5GT/s) x4/x2/x1; called PCIe in this document.  MDI (Copper) standard IEEE 802.3 Ethernet interface for

PH6n

Abstract: ph5n ph8n
Contextual Info: SPEAR-09-P022 SPEAr Plus600 dual processor cores Preliminary Data Features • Dual ARM926EJ-S core @333MHz. ■ 600KByte reconfigurable logic array with 88 dedicated General purposes I/Os, 9 LVDS channels and 128KByte configurable internal memory pool.

ph5n

Abstract: "ph4n" ph6n UART TTL buffer ph0n DDRDATA11 kss3k
Contextual Info: SPEAR-09-H122 SPEAr Head600 Preliminary Data Features • ARM926EJ-S core @333MHz. ■ 600KByte reconfigurable logic array with 88 dedicated General purposes I/Os, 9 LVDS channels and 128KByte configurable internal memory pool. ■ Multilayer AMBA 2.0 compliant Bus with fMAX

transistor PH6n

Abstract: PH6N SPEAR-09-P022 ph5n ph4n ph8n Plus600 TA 8268 analog ARM926EJS ARM926EJ-S
Contextual Info: SPEAR-09-P022 SPEAr Plus600 dual processor cores Preliminary Data Features • Dual ARM926EJ-S core @333 MHz ■ 600 Kbyte reconfigurable logic array with 88 dedicated general purposes I/Os, 9 LVDS channels and 128 Kbyte configurable internal memory pool

OEM ECU system block diagrams

Abstract: MC33904 MC33903S MCZ3390 CIRCUIT SCHEMATIC ECU CAR 32-PIN 54-PIN ISO11898-2 ISO11898-5 SCHEMATIC CAR ECU
Contextual Info: Freescale Semiconductor Technical Data Document Number: MC33903_4_5 Rev. 7.0, 9/2011 SBC Gen2 with CAN High Speed and LIN Interface 33903/ 33903/4/5 The 33903/4/5 is the second generation family of the System Basis Chip SBC . It combines several features and enhances present

PH6N

Abstract: TRANSISTOR PH6N transistor ph4n
Contextual Info: SPEAr600 Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface Datasheet − production data Features • Dual ARM926EJ-S core up to 333 MHz: – Each with 16 Kbytes instruction cache + 16

Contextual Info: SPEAr320 Embedded MPU with ARM926 core, optimized for factory automation and consumer applications Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions on 102 shared I/Os.

Contextual Info: UCD9080 www.ti.com SLVS692 – SEPTEMBER 2006 8-CHANNEL POWER SUPPLY SEQUENCER AND MONITOR FEATURES APPLICATIONS • • • • • • • • • • • • • • • • Telecommunications Switches Servers Networking Equipment Test Equipment Any System Requiring Sequencing of

PCIe PHY

Abstract: schematic diagram inverter lcd monitor 82575 Midcom 7187 qh25f016s33b foxconn 1000BASE-KX Backplane Silicon Point Contact Mixer Diodes 1000BASE-KX intel 945 motherboard schematic diagram
Contextual Info: Intel 82580EB/82580DB Gigabit Ethernet Controller Datasheet LAN Access Division LAD FEATURES External Interfaces Provided: • Virtualization Ready: PCIe v2.0 (5Gbps and 2.5Gbps) x4/x2/x1; called PCIe in this document. • Enhanced VMDq1 support: • MDI (Copper) standard IEEE 802.3 Ethernet interface for

TDK common mode choke application note

Abstract: ACT45 ACT45B-510 MC33904 ISO7637 TDK common mode choke MC33905S NUP2105L failure report MC33905
Contextual Info: Freescale Semiconductor Application Note AN3865 Rev. 1.0, 2/2010 Managing Failure Detections and Using Required Components to Meet ISO7637 pulse 1 on MC33903/4/5 Common Mode Choke Implementation 1 Overview Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1kw full bridge converter design

Abstract: TMS320 UCD9080 UCD9080RHBR UCD9080RHBRG4 UCD9080RHBT UCD9080RHBTG4
Contextual Info: UCD9080 www.ti.com. SLVS692E – SEPTEMBER 2006 – REVISED MAY 2008 8-CHANNEL POWER-SUPPLY SEQUENCER AND MONITOR

Contextual Info: SigmaDSP Digital Audio Processor with Flexible Audio Routing Matrix ADAU1442/ADAU1445/ADAU1446 Data Sheet FEATURES I2C and SPI control interfaces Standalone operation Self-boot from serial EEPROM 4-channel, 10-bit auxiliary control ADC Multipurpose pins for digital controls and outputs

FLashSta

Contextual Info: UCD9080 www.ti.com SLVS692D – SEPTEMBER 2006 – REVISED DECEMBER 2007 8-CHANNEL POWER SUPPLY SEQUENCER AND MONITOR FEATURES APPLICATIONS • Single Supply Voltage: 3.3 V • Low Power Consumption • Sequences and Monitors up to Eight Voltage Rails • Rail Voltages Sampled Every 50 µs With

Contextual Info: Freescale Semiconductor Technical Data SBC Gen2 with CAN High Speed and LIN Interface The 34903/4/5 is the second generation family of the System Basis Chip SBC . It combines several features and enhances present module designs. The device works as an advanced power

H122

Abstract: ph6n PH5N ph8n transistor PH6n ph7n ph4n ARMv5TEJ 0xE12 E31821
Contextual Info: SPEAR-09-H122 SPEAr Head600 Preliminary Data Features • ARM926EJ-S core @333MHz. ■ 600KByte reconfigurable logic array with 88 dedicated General purposes I/Os, 9 LVDS channels and 128KByte configurable internal memory pool. ■ Multilayer AMBA 2.0 compliant Bus with fMAX