1/H R C M F 2J 225 Search Results

Contextual Info: Metalized Polyester FILM CAPACITORS Part Number Construction MMF 225 —!— I Type' 1. 2. K TYPE MMF/MMT FLAT METALIZED POLYESTER FILM 2G ~r WVDC* Capacity2 Tolerance3 The Arco MMF/MMT Series of metalized polyester capaci­ tors are constructed of metalized polyester film dielectric with

CQ05

Contextual Info: OIL CAPACITOR FC11LG107K1 Dimension mm Test voltage {1 minute) Rated voltage Type W 1^5 2250VDC S 1500VDC FC11LH506K1 S FC12LH257K1 2000VDC 3000VDC FC11LK256K1 S FC12LK1256K1 3000VDC 4500VDC F C 89 se rie s -?^ t i ^ — / \° - =1 > yy- x r 130 200 1^5

Contextual Info: LS73 LS76 LS107 LS112 Dual J-K Negative-Edge-Triggered Flip-Flops LS113 •Pin-for-Pin and functional equivalents to 5473, 5476, 54107, 54S112, 54S113 PIN-OUT DIAGRAMS DESCRIPTION These monolithic dual J-K flip-flops feature individual J, K, clock, and asynchronous preset and clear inputs to each

RJ45 modular jack

Abstract: la log 206H
Contextual Info: 1. S c h e m a t ic : n . j ISOLATION: 2250 Vdc min at 605ec Input-Output TURNS RATIO: (PRl/SEC ) 1CT:1CT ± 2 % O C L 350uH MIN @100KHz 100m V SmADC Q:18 Min @lOOKHz 0.1 V DCR: 0.65 Ohms Max Each (1 /2 winding) DCR IMBALANCE: ± 0 .0 6 5 Ohms Max (CENTER TAP SYMMETRY)

208H

Contextual Info: 1. Sch em atic: “I .J ISOLATION: 2250 Vdc min at 60Sec Input-Output TURNS RATIO: (P R I/SE C ) 1CT:1CT ±2 % OCL: 350uH MIN @100KHz 100mV 8mADC Q:18 Min @100KHz 0.1V DCR: 0.65 Ohms Max Each (1 /2 winding) DCR IMBALANCE: ±0.065 Ohms Max (CENTER TAP SYMMETRY)

208H

Contextual Info: 1. Sch em atic: “I .J ISOLATION: 2250 Vdc min at 60Sec Input-Output TURNS RATIO: (P R I/SE C ) 1CT:1CT ±2 % OCL: 350uH MIN @100KHz 100mV 8mADC Q:18 Min @100KHz 0.1V DCR: 0.65 Ohms Max Each (1 /2 winding) DCR IMBALANCE: ±0.065 Ohms Max (CENTER TAP SYMMETRY)

CXD 1130

Contextual Info: SONY CXD2443Q Timing Generator for LCD Panels Description The CXD2443Q is a timing generator for the LCD panel LCX011 and LCX019 driver. This chip has a built-in serial interface circuit which allows various settings to be performed through external control

et 1102

Abstract: ely transformers PM6341 PM4341A TS16 IC Data-book g803
Contextual Info: PM6341 E1XC DATA SHEET ISSUE 8 E1 FRAMER/TRANSCEIVER :2 8: 03 AM PMC-910419 ,1 n Su nd ay E1XC 2J an ua ry ,2 00 3 02 PM6341 sil ico ne xp er to E1 FRAMER/TRANSCEIVER ISSUE 8: JUNE 1998 Do wn lo ad ed by ah m ed m et wa ly of DATA SHEET PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

XFGIG12L-CTGxu2-4M

Abstract: 208H RJ45 LED
Contextual Info: Sch em atic: Two Ports n . j ,L * ft LED ISOLATION: 2250VDC TURNS RATIO: (P R I/S E C ) 1CT:1CT ±2% 12 o OCL: 350uH MIN @100KHz 100m V 8mADC RISE TIME: 2 .5 0 n s Max. r Right LED 14 o SCHEMATIC BICOLOR LED C o m p le te th e G =Green A= A m ber R=Red Notes:

Contextual Info: Metalized Polyester FILM CAPACITORS Part Number Construction MiyiR Type' 225 Capacity2 WVDC4 Tolerance3 1. Type: MMR 2. Capacity: The first two digits are significant, the last digit indicates the number of zeros. 3. Tolerance: J=5%; K=10%; M=20%; 4. Voltage: 2E=250V; 2G=400V; 2J=630V

Contextual Info: HARRIS SEfllCOND SECTOR HARRIS IbE D H M • 430E271 001424S t> ■ U 1 6 / H PRELIMINARY January 1989 M T - 7 3 “ 3l? U 1 7 1 6 x 16 -B it Parallel CMOS Multipliers Features Description • 16 x 16-B it Parallel Multiplier with Full 32-B it Product. The HMU16/HMU17 are high speed, low power CMOS

AP 309

Abstract: XFATM2SA-CLxu4-4MS
Contextual Info: S ch em atic: one of four .J E le c tric a l S p ecificatio n s: 25°C Isolation Voltage: 2250 Vrms (INPUT to OUTPUT) UTP SIDE OCL: 350uH Min 1 OOKHz 100mV 8mADC Rise Time (10—90%): 2.5ns Typical Insertion Loss (1 OOKHz—999KHz): — 1.0dB Maximum

Contextual Info: SONY CXD2443Q Timing Generator for LCD Panels Description The CXD2443Q is a timing generator for the LCD panel LCX011 and LCX019 driver. This chip has a built-in serial interface circuit which allows various settings to be performed through external control

SJT07

Abstract: F404 EI- 33C marking 2j4 socapex sx
Contextual Info: SJT 00 C l 16-35 P A F404 LF Ser i es - 1 I I I I I SJ T : St andar d scoop-proof Juni or Tr i -Lock Connector SJ TP : Back p a n e l mo u n t e d SJT00 SJTP00 Sh e l l type -00 : WaI I mo u n t r e c e p t a c I e 07 : Jam n u t r e c e p t a c I e

LA5605

Abstract: N4459
Contextual Info: — KNo. N4459 NO. 4459 22593 L A 5 6 0 5 ^ C D 7 ^ - ir f f lt * ^ f A | LA v * r m nt W -r 'r X W - A 5 6 0 5 I± , 7 .5 V / 5 0 0 m *}, A f f lW IC T * * ^ > ^ '^ 7 * * 0 » A W fi& in g iU ^ a U - ^ C D ? V ij i L 5 > h t ^ A C / D C M iH 5 0 - C D ^ 'V r t - f e

MAX232

Contextual Info: 74HC/HCT112 flip-flops DUAL JK FLIP-FLOP WITH SET AND RESET; NEGATIVE-EDGE TRIGGER FEATURES • • • TYPICAL Asynchronous set and reset Output capability: standard l£ £ category: flip-flops GENERAL DESCRIPTION ic p 1K JT u IT HCT 17 15 18 19 15 19 tP H l/

0,33 MF 630v CAPACITOR

Abstract: Nichicon hm
Contextual Info: nicHicon PLASTIC FILM CAPACITORS • Table 7 AS series Permissible Current and VA Value 250VDC 2E Capacitance Permissible Effective Current (u F ) Is (A) Permissible Peak Current at Single Pulse Ip2 (A) 400VDC (2G) Permissible VA Value (le X V e ) Permissible Peak

NSP 233

Abstract: D15114
Contextual Info: 74HC/HC T112 flip-flops DUAL JK FLIP-FLOP W ITH SET AND RESET; NEGATIVE-EDGE TRIGGER FEATURES TYPICAL • Asynchronous set and reset • Output capability: standard • IQ0 category: flip-flops PARAMETER SYMBOL U NIT CONDITIONS HC HCT 17 15 18 19 15 19 ns

HCT112

Abstract: HCT-112 74HC 74HCT S0 1J
Contextual Info: 7 4H C /H C T 112 flip-flops DUAL JK FLIP-FLOP WITH SET AND RESET; IMEGATIVE-EDGE TRIGGER FEATURES TYPICAL The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky T T L LSTTL . They are specified in compliance w ith JEDEC standard no.7A.

Contextual Info: Metalized Polyester FILM CAPACITORS Part Number Construction MMF 3. 4. T Ifl/VDC4 Capacity2 Tolerance3 Type' 1. 2. 2G 22 5 —!— TYPE MMF/MMT FLAT METALIZED POLYESTER FILM The Arco MMF/MMT Series of metalized polyester capaci­ tors are constructed of metalized polyester film dielectric with

PLCC84P

Abstract: PLCC-84-P-T-2 PLCC-84P-T-2
Contextual Info: r STANDARD FCI PART NUMBER OLD BERG PART NUMBER PERFORMANCE DATA DIMENSIONS JEDEC PKG. NUMBER A B C D E F G H J INSERTION EXTRACTION FORCE FORCE 1/ +.004 I +.004 LBF. MAX. (LBF. MIN.) ^ -.0 0 8 L -.0 0 8 WEIGHT (OUNCES) P L C C - 2 0 P -T 6 9 3 9 4 -0 2 0

SN54ALS113A

Abstract: SN74ALS113A SN74ALS113 ALS113A
Contextual Info: SN54ALS113A, SN74ALS113A DUAL J K NEGATIVE EDGE TRIGGERED FLIP FLOPS WITH PRESET D 2 2 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 • Fully Buffered to Offer Maxim um Isolation from External Disturbance • Package Options Include Plastic "Sm all

Contextual Info: MULTILAYER CERAMIC CHIP CAPACITORS CGA Series, CKC Series Automotive Grade Soft Termination Type: CGA4 [EIA CC0805] CGA5 [EIA CC1206] CGA6 [EIA CC1210] CGA7 [EIA CC1808] CGA8 [EIA CC1812] CGA9 [EIA CC2220] CKCM25 [EIA CC0504] CKCL22 [EIA CC0805] Issue date:

54AS113

Contextual Info: TYPES SN54ALS113A, SN54AS113, SN74ALS113A, SN74AS113 DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 Fully Buffered to O ffer Maxim um Isolation from External Disturbance SN54ALS113A, SN 54A S113 . . . J PACKAGE