10 V 11 RN 103 F COC 102 Search Results

HYM5V72A404

Abstract: RKT 1270
Contextual Info: - -• HYM5V72A404C N-Series ‘H Y U N D A I Buffered 4Mx72 bit EDO DRAM MODULE based on 4Mx4 DRAM, with ECC, 3.3V, 4K-Refresh -S GENERAL DESCRIPTION The HYM 5V72A404C N-Series is a 4Mx72-bit Extended Data Out mode CMOS DRAM module consisting of

dot matrix 8*8 TOM -1588

Abstract: KS0070 DD 105 N 16 L
Contextual Info: CMOS DIGITAL INTEGRATED CIRCUIT KS0070 DOT MATRIX LCD CONTROLLER & DRIVER KS0070 is a dot m atrix LCD driver & c o n troller LSI w hich is fabricated by low pow er CMOS tech nolog y. FUNCTION • Character type dot matrix LCD driver & controller • Internal driver: 16 common and 80 segment signal

HD63450

Abstract: HD63450P10 HD63450CP12 HD63450-8 63450ps hd63484
Contextual Info: HD63450 Series-CMOS Direct Memory Access Controller T h e H D 6 3 4 5 0 is a C M O S D irect M em ory A cc e s s Controller D M A C . It is upw ardly com patible w ith th e N M O S D M A C H D 68450. In addition to th e N M O S D M A C H D 6 8 4 5 0 fe a tu re s, the

hd68450

Abstract: utc 1018 HD68450u
Contextual Info: HD68450 - Direct Memory Access Controller NMOS M icroprocessor im p lem en ted system s are becom ing increas­ ingly co m p lex , particu larly w ith the advent o f high -perfo rm ance 16-bit M PU devices w ith large m em o ry addressing capability. In

Halbleiterbauelemente DDR

Abstract: GAZ17 diode sy-250 "halbleiterwerk frankfurt" sal41 diode sy-170 SF 127 diode say17 Halbleiter-Bauelemente DDR SY 170
Contextual Info: eiecrronic Halbleiter-Bauelemente Die vorliegende Übersicht enthält in gedrängter Form die wichtigsten Grenz- und Kenndaten der in der DD R gefertigten H albleiterbauelem ente. Die Kennwerte werden im allgem einen für eine Um gebungs­ temperatur von 25 °C angegeben.

CAS 6-NP

Contextual Info: EPSON _ E0C33A104 32-bit Single Chip Microcomputer ^ • 32-bit E0C33000 RISC Core • M ultiplication and Accum ulation Instruction ^ • 10-bit ADC, 8-bit DAC • H igh-speed DMA, Intelligent DMA • Tw in-clock O scillator I DESCRIPTION The E0C33A104 is a CMOS 32-bit microcomputer composed of a CMOS 32-bit RISC core, RAM, DMA control­

Contextual Info: TOS H IB A UC/UP 54E J> m TGTTSm 0D53Ö31 TO SH IB A 1. TbB TMP68442 INTRODUCTION TLCS-68000 microprocessors utilize state-of-the-art MOS technology to m axim ize performance and throughput. The TMP68442 extended dual-direct memory access controller (EDDMA) is designed to com plem ent the perform ance and a rch ite ctu ral

TLCS-68000

Contextual Info: TOSHIBA UC/UP S4E D TO SHIBA m c]DcJ754tì □ 0 2 3 c14b 274 « T O S a TMP68450 —t— IT? - '•V3,- \ 9 1. INTRODUCTION TLCS-68000 microprocessors utilize state-o f-the-art MOS technology to maxim ize performance and throughput. The TMP68450 direct memory access controller (DMAC)

pcb diagram of mini ups system

Abstract: HD68450 PGA68 HD68000 HD68450-10 1047 jrc HD68450-4 HD68450-6 HD68450-8 HD68450Y-4
Contextual Info: HD68450- Direct Memory Access Controller NMOS M ic r o p ro c e s s o r i m p l e m e n te d s y s te m s a re b e c o m in g in c re a s in g ly c o m p l e x , p a r t i c u l a r l y w ith th e a d v e n t o f h ig h - p e r f o r m a n c e

TRANSISTOR ztx 105 3a

Abstract: TRANZORB ericsson slic Relay RL1, 5V, 100 ohm
Contextual Info: September 1989 ERICSSON ^ PBL 3762 Subscriber Line Interface Circuit Description Key Features The PBL 3762 Subscriber Line Interface Circuit SLIC is a bipolar integrated circuit in 75 V technology which replaces the conventional transformer based analog line

HD63450-8

Abstract: HD63450P10 HD63450P8 hd63484 hd63450p12 hd6345 aj60 1S2074H-E HD63450-10 HD63450
Contextual Info: HD63450 S e rie s -CMOS Direct Memory Access Controller T h e HD63450 is a C M O S D irect M em o ry Access Controller D M A C . I t is upwardly compatible w ith the N M O S D M A C HD68450. In addition to the N M O S D M A C HD68450 features, the

Contextual Info: '%//W3 y lM V292BMC * Rev. D HIGH PERFORMANCE BURST DRAM CONTROLLER FOR Am29030/40 PROCESSORS *^ ▼ / í , *"c0*, • Pin/Software compatible with earlier V292BMC. • Integrated Page Cache Management. • Direct interfaces to Am 29030/40 processors.

Contextual Info: Lattice i ^iporatfont0r ispLSr 2096E In-System Programmable SuperFAST High Density PLD Fe a tu re s F u n c tio n a l B lo c k D iagram • SUPERFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — — — — — 4000 PLD Gates 96 I/O Pins, Six Dedicated Inputs

FS DMO 365 RN

Abstract: mxj A1 connector LS 2027 audio amp MA81C WDA42 lx4 d09 st3pc 13T4 0601N D1661
Contextual Info: Model : F17P R:1 Intel Pentium 4 LGA775 +PT880+VIA8235 C E PCB STACK UP LAY1 LAY 2 LAY 3 LAY 4 LAY 5 LAY 6 LAY 7 LAY 8 LAY 9 LAY10 TOP GND INI IN2 GND1 VCC IN3 IN4 GND2 BOTTOM Revision History A O R IG IN A L RE LEA SE fe . cCL V?, o . ^ •Pff' j L

562105 transformer

Abstract: RP-405 RCA W RF220N axe 10 subscriber line interface tranzorb diode zener diode zg RCA 4136 RCA Solid State amplifier RELAY RR 24V ac 12V dc ericsson rop
Contextual Info: ERICSSON COMPONENTS INC ERICSSON ^ lb ED • 3373bfl0 QOOlSSb 0 ■ September 1989 T - Z 5 V A / 7 PBL 3765 Subscriber Line Interface Circuit Description Key Features The PBL 3765 Subscriber Line Interface Circuit SLIC is a bipolar integrated circuit in

CY37256

Abstract: CY37256V
Contextual Info: CY37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD F eatu res — tPD = 12 ns — ts = 7.0 ns • 256 m a cro c ells in sixteen logic blocks — tc o = 6.0 ns • 3.3V In-S ystem R eprog ram m ab le™ IS R ™ • P ro d uct-term clocking — JT A G -co m p liant o n -b o a rd p ro gram m in g

TA8172AF

Abstract: TB 1226 BN TA8859P mg75n2ys40 t6961A TA8242AK ta8644n 7378P ta8310 7628P
Contextual Info: Index of Type Number Type Number 015Z10 015Z11 015Z12 015Z2.0 015Z2.0-12 015Z2.2 015Z2.4 015Z2.7 015Z3.0 015Z3.3 015Z3.6 015Z3.9 015Z4.3 015Z4.7 015Z5.1 015Z5.6 015Z6.2 015Z6.8 015Z7.5 015Z8.2 015Z9.1 02CZ10 02CZ11 0 2 C Z 12 0 2 C Z 13 0 2 C Z 15 0 2 C Z 16

vic068a-bc

Abstract: A07T Shared resource arbitration
Contextual Info: fax id: 5601 VIC068A VMEbus Interface Controller — Seven local interrupt lines Featu res • Complete VMEbus interface controller and arbiter — 58 internal registers provide configuration control and status of VMEbus and local operations — 8-level interrupt priority encode

Contextual Info: HYM72V64C756T4 64Mx72, 64Mx4 based, PC100 DESC RIPTIO N The HYM72V64C756T4 -Series are high speed 3.3-Voit synchronous dynamic RAM Modules composed of eighteen 64Mx4 bit Synchronous DRAMs in 54-pin TSOPII, two 48-pin SOP Register Buffers, one 24-pin SOP PLL and 8-pin

4057D

Abstract: 4011N
Contextual Info: 155 Mbps ATM SAR CONTROLLER WITH ABR SUPPORT FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77222 KEY FEATURES • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed). • Performs ATM layer protocol functions.

I-CUBE

Abstract: P005 p055 TRANSISTOR IDS200 p055 power transistor IQ32B IQ48 IQ64B IQ96 84l transistor
Contextual Info: I-Cube IQ Family Data Sheet m F eatures D e s c r ip t io n • SRAM-based, in-system programmable The IQ family of SRAM-based bit-oriented switching devices is • Switch Matrix manufactured using 0.6|jm CMOS processes. These devices — Non-Blocking offer clock speeds of up to 150 MHz and pin-to-pin delay as low

Contextual Info: Lattice ispLSI' and pLSI’ 2096 ; Semiconductor I Corporation High Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC Output Routing Pool ORP — — — — — 4000 PLD Gates 96 I/O Pins, Six Dedicated Inputs

gl 40t

Abstract: dtl 946 ic 6301-1j ALY MARKING ET 3005 ANI 1015 MIL-M-38510/30 1N4150 M38510 475t
Contextual Info: M IL -M -38510/30A 27 D e c e m b e r 1974 SUPERSED IN G M IL -M -3 8 5 1 0 /3 0 21 D e c e m b e r 1972 M ILITA RY S PE C IFIC A T IO N M ICR O C IR CU ITS, D IG IT A L , D T L , NAND G A TES, M ONOLITHIC SILICON T h is s p e c ific a tio n is ap p ro v e d fo r u s e bv a ll D e p a r t­

Contextual Info: BURR -BR O W N « [ ] IS0806 S in Isolated 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION • 1500Vrms ISOLATION CONTINUOUS The ISO 8O6 is a low-power isolated sampling ADC using state-of-the-art CMOS structures and high volt­ age capacitors. The ISO 8O6 contains a complete 12-bit