1024X36X2 Search Results

Contextual Info: ggSi'x jjûfey CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 IDT723622 ¡DT723642 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation for the IDT723642 FEATURES: • Free-running CLKA and CLKB m ay be asynchronous or

Contextual Info: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have

Contextual Info: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

Contextual Info: Integrated Device TechnoJogy, lie. PRELIMINARY IDT723624 IDT723634 IDT723644 CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

L2735

Abstract: D-34A i-box
Contextual Info: LH543611/21 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

Contextual Info: L H 5 4 3 6 1 1 / 2 1 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

Contextual Info: In teg rated D evice Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 FEATURES: • Memory storage capacity: IDT723624-256 x 36 x 2 IDT723634-512 x 3 6 x 2 IDT723644-10 2 4 x 3 6 x 2 • Two independent clocked FIFOs buffering data in

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1024x36x2 IDT723622 IDT723632 IDT723642 Integrated D evice Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

Contextual Info: |dy In teg rated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

Contextual Info: In tegrated D e vice T e ch n o lo g y , Inc. CMOS Triple Bus SyncFIFOT With Bus-Matching 256x36x2, 512x36x2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: The errata notice on the last page describes corrections that have already been added to this document.

A14C

Abstract: A15C A23C A25C SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3642 1024x36x2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC A S440-JUN E 1994 IRB, ORB, AEB, and AFB Flags Synchronized by CLKB Low-Power 0.8-Micron Advanced CMOS Technology Supports Clock Frequencies up to 67 MHz Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

Contextual Info: IDT723622 IDT723632 IDT723642 CMOS SyncBiFIFO 256x36x2, 512x36x2, 1024x36x2 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation f o r the IDT723642 • • • • • • • Program mable Alm ost-Full and Alm ost-Em pty flags

Contextual Info: In teg rated D evice Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 FEATURES: • Memory storage capacity: IDT723624-256 x 36 x 2 IDT723634-512x36x2 IDT723644-1024x36x2 • Two independent clocked FIFOs buffering data in

A20C

Abstract: A23C A25C A26C SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3642 1024x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS440A - JUNE 1994 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent Clocked FIFOs Buffering Data in Opposite Directions Mailbox-Bypass Register for Each FIFO