10FEB2006 Search Results

Contextual Info: THS1009 www.ti.com SLAS287A – AUGUST 2000 – REVISED DECEMBER 2002 10ĆBIT, 2 ANALOG INPUT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOGĆTOĆDIGITAL CONVERTER FEATURES D Simultaneous Sampling of Two Single-Ended Signals or One Differential Signals or Combination of Both

LM324

Contextual Info: OPA1013 Precision, Single-Supply DUAL OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● ● ● ● ● ● ● ● ● ● SINGLE POWER SUPPLY OPERATION INPUT VOLTAGE RANGE TO GROUND OUTPUT SWINGS NEAR GROUND LOW QUIESCENT CURRENT: 550µA max LOW VOS: 300µV max

BQ24720

Abstract: DSP 103 thermister
Contextual Info: bq24721 www.ti.com SLUS683A – NOVEMBER 2005 – REVISED JANUARY 2006 ADVANCED MULTI-CHEMISTRY AND MULTI-CELL SYNCHRONOUS SWITCH-MODE CHARGER AND SYSTEM POWER SELECTOR FEATURES APPLICATIONS • • • • LODRV PGND ALARM 27 26 25 PH REGN 28 HIDRV 30 29

Contextual Info: SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 www.ti.com SLLS624B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS • FEATURES • • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Clock Rates to 1 GHz

QFN-48

Abstract: TLV320AIC29 TLV320AIC29IRGZ TLV320AIC29IRGZR C530h
Contextual Info: TLV320AIC29 www.ti.com SLAS494A − DECEMBER 2005 − REVISED JANUARY 2006 STEREO AUDIO CODEC WITH INTEGRATED HEADPHONE AND SPEAKER AMPLIFIERS FEATURES D Stereo Audio DAC and Mono Audio ADC Support Rates Up to 48 ksps D High Quality 95-dB Stereo Audio Playback

TPS2041BDRG4

Abstract: TPS2042BDG4 2054B TUSB2040
Contextual Info: DGN−8 TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B D−16 D−8 www.ti.com SLVS514E – APRIL 2004 – REVISED JANUARY 2006 CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES FEATURES APPLICATIONS • • • • • • • •

SN75LVDS81

Abstract: DTS2070C HP8656B HP8665A SN75LVDS86
Contextual Info: SN75LVDS86 FLATLINK RECEIVER SLLS268C – MARCH 1997 – REVISED MAY 1999 D D D D D D D D D D D D D 3:21 Data Channel Expansion at up to 163 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI

CDC921

Abstract: CDC922 CDC924 CDC925 CDCR81 CDCR81DBQ CDCR81DBQR MO-137
Contextual Info: CDCR81 DIRECT RAMBUS CLOCK GENERATOR SCAS606B – NOVEMBER 1998 – REVISED NOVEMBER 1999 D D D D D D D D D D 300-MHz Differential Clock Source for Direct RAMBUS Memory Systems for an 600-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System

Contextual Info: SN65LVDS20 SN65LVP20 www.ti.com SLLS620A – JUNE 2004 – REVISED SEPTEMBER 2005 LVPECL AND LVDS REPEATER/TRANSLATOR WITH ENABLE FEATURES • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Signaling Rates to 4 Gbps or Clock Rates to 2 GHz

Contextual Info: DA DAC8812 C8 812 www.ti.com SBAS349A – AUGUST 2005 – REVISED DECEMBER 2005 Dual, Serial Input 16-Bit Multiplying Digital-to-Analog Converter FEATURES DESCRIPTION • • • The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter DAC designed to operate

VDFPN8 package

Contextual Info: M25P32 32-Mbit, low voltage, Serial Flash memory with 50 MHz SPI bus interface Features • 32 Mbit of Flash memory ■ 2.7 V to 3.6 V single supply voltage ■ SPI bus compatible serial interface ■ 50 MHz clock rate maximum ■ VPP = 9 V for Fast Program/Erase mode

ST6G3238E

Abstract: ST6G3238ETBR ST6G3238ETTR TSSOP24
Contextual Info: ST6G3238E Dual supply level translator for SD/ MINISD/ T-FLASH With ±8KV contact discharge ESD protection Features • High speed: tPD = 4.4ns Typ. at TA = 85°C VCCB = 2.7V VCCA = 1.8V ■ Low power dissipation: ICCA = ICCB = 5µA (Max.) at TA = 85°C

CDC2510

Abstract: CDC2510PWR CDC2510PWRG4 CDCVF2510A MTSS001C
Contextual Info: CDC2510 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS597B − DECEMBER 1997 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D PW PACKAGE TOP VIEW this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

IPC7531

Abstract: marking code eua SMAJ24CA-TR EUA MARKING CODE SMAJ12A SMAJ12CA-TR SMAJ170A/CA SMAJ40A/CA marking code 63, sma package SMAJ12A/CA
Contextual Info: SMAJ Transil Features A • Peak pulse power: – 400 W 10/1000 µs ■ Stand off voltage range: from 5 V to 188 V K ■ Unidirectional and bidirectional types Unidirectional ■ Operating Tj max: 150 °C ■ JEDEC registered package outline Bidirectional

Contextual Info: SMAJ Transil Features • Peak pulse power: – 400 W 10/1000 µs – 2.3 kW (8/20 s) A ■ Stand off voltage range: from 5 V to 188 V ■ Unidirectional and bidirectional types K ■ Low leakage current: – 0.2 A at 25 °C – 1 A at 85 °C Unidirectional

OPA2690

Abstract: OPA689 OPA690 OPA698 OPA699 OPA699ID OPA699IDR 1G SOIC
Contextual Info: OPA699 OPA 699 SBOS261B – NOVEMBER 2002 – REVISED OCTOBER 2003 Wideband, High Gain VOLTAGE LIMITING AMPLIFIER FEATURES APPLICATIONS ● ● ● ● ● ● ● ● ● ● TRANSIMPEDANCE WITH FAST OVERDRIVE RECOVERY ● FAST LIMITING ADC INPUT DRIVER ● LOW PROP DELAY COMPARATOR

ADS7816

Abstract: ADS7822 ADS8320 ADS8320E ADS8320EB
Contextual Info: ADS8320 SBAS108B – MAY 2000 – REVISED DECEMBER 2005 16-Bit, High-Speed, 2.7V to 5V microPower Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 100kHz SAMPLING RATE ● MICRO POWER: 1.8mW at 100kHz and 2.7V 0.3mW at 10kHz and 2.7V ● POWER DOWN: 3µA max

OPA643

Abstract: OPA842 OPA843 OPA843ID OPA843IDR OPA846 OPA847
Contextual Info: OPA843 OPA 843 SBOS268A – DECEMBER 2002 – OCTOBER 2003 Wideband, Low Distortion, Medium Gain, Voltage-Feedback OPERATIONAL AMPLIFIER FEATURES DESCRIPTION ● HIGH BANDWIDTH: 260MHz G = +5 The OPA843 provides a level of speed and dynamic range previously unattainable in a monolithic op amp. Using a high

OPA2690

Abstract: OPA2691 OPA3682 OPA3690 OPA3691 OPA3692 OPA690 OPA691 OPA692
Contextual Info: OPA3692 OPA 369 2 SBOS228C – FEBRUARY 2002 – REVISED JANUARY 2003 Triple, Wideband, Fixed Gain Video BUFFER AMPLIFIER With Disable FEATURES APPLICATIONS ● FLEXIBLE SUPPLY RANGE: +5V to +12V Single Supply ±2.5V to ±6V Dual Supplies ● INTERNALLY FIXED GAIN: +2 or ±1

CDC2510

Abstract: CDC2510PWR CDC2510PWRG4 CDCVF2510A MTSS001C
Contextual Info: CDC2510 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS597B − DECEMBER 1997 − REVISED DECEMBER 2004 D Use CDCVF2510A as a Replacement for D D D D D D D D PW PACKAGE TOP VIEW this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

SN65MLVD201

Abstract: MF200 SN65MLVD200 SN65MLVD200D SN65MLVD202 SN65MLVD202D SN65MLVD204 SN65MLVD204D SN65MLVD205
Contextual Info: SN65MLVD200, SN65MLVD202 SN65MLVD204, SN65MLVD205 MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003 D Low-Voltage Differential 30-Ω Line Drivers D D D D D and Receivers for Signaling Rates† up to 100 Mbps Power Dissipation at 100 Mbps

CDCVF2310

Abstract: CDCVF2310PW CDCVF2310PWG4 CDCVF2310PWR CDCVF2310PWRG4 MTSS001C
Contextual Info: CDCVF2310 www.ti.com SCAS666B – JUNE 2001 – REVISED JANUARY 2004 2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER • • • • • • • • High-Performance 1:10 Clock Driver for General-Purpose Applications. Operates up to 200 MHz at VDD 3.3 V Pin-to-Pin Skew < 100 ps at VDD 3.3 V

ADS7841

Abstract: ADS8341 ADS8343 ADS8343E ADS8343EB SSOP-16
Contextual Info: ADS8343 ADS8 343 SBAS183C – JANUARY 2001 – REVISED APRIL 2003 16-Bit, 4-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● BIPOLAR INPUT RANGE The ADS8343 is a 4-channel, 16-bit sampling Analog-toDigital A/D converter with a synchronous serial interface.

ADS7861

Abstract: ADS8361 ADS8361IDBQ ADS8361IDBQR ADS8361IRHBT QFN-32
Contextual Info: ADS AD S 83 836 ADS8361 1 61 SBAS230C – AUGUST 2002 – REVISED SEPTEMBER 2004 Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● ● ● ● ● ● ● ● ● The ADS8361 is a dual, 16-bit, 500kSPS, Analog-to-Digital