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    Nexperia 74LVC2G34GW,125

    Buffers & Line Drivers SOT363-1 BUFFERS & LINE DVRS
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    TTI 74LVC2G34GW,125 Reel 30,000 3,000
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    ROHM Semiconductor BU8254GUW-E2

    Serializers & Deserializers - Serdes SWITCH ICS
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    TTI BU8254GUW-E2 Reel 2,000
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    Nexperia HEF4028BT,653

    Encoders, Decoders, Multiplexers & Demultiplexers ANALOG & LOGIC
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    TTI HEF4028BT,653 Reel 5,000
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    Nexperia 74LVC2G34GW-Q100,1

    Buffers & Line Drivers SOT363-1 DUAL BUFFER GATE
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    TTI 74LVC2G34GW-Q100,1 Reel 6,000
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    Nexperia 74LVC3G07DC,125

    Buffers & Line Drivers SOT765-1 TRIPLE BUFFER
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    TTI 74LVC3G07DC,125 Reel 3,000
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    10OUTPUT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: LMK00301 Evaluation Board User Guide National Semiconductor Corporation User Guide 20 September 2011 General Description This user guide describes how to set up and operate the LMK00301 evaluation board kit EVK . The LMK00301 is a 3-GHz, 10-output differential fanout buffer intended for high-frequency, low-additive jitter clock/data


    Original     		PDF LMK00301 10-output

    md 5406

    Abstract: pin out md 5406 Si5341
    Text: S i 5 3 4 1/40 L O W - J I T T E R, 1 0 - O U T P U T , A NY -F R E Q U E N C Y, A NY -O U T P U T CLOCK GENERATOR Features RSVD OUT8 OUT8 VDDO8 OUT7 OUT7 VDDO7 54 53 52 51 50 49 OUT9 VDDO9 OUT9 58 55 VDD 59 RSVD FB_IN 60 56 FB_IN 61 OUT6 44 OUT6 RST 6 43


    Original     		PDF

    LMK04000BISQ

    Abstract: LMK04001BISQ LMK04002BISQ LMK04010BISQ LMK04011BISQ LMK04031BISQ LMK04033BISQ
    Text: LMK04000 Family Low-Noise Clock Jitter Cleaner with Cascaded PLLs 1.0 General Description 2.0 Features The LMK04000 family of precision clock conditioners provides low-noise jitter cleaning, clock multiplication and distribution without the need for high-performance voltage controlled crystal oscillators VCXO module. Using a cascaded


    Original     		PDF LMK04000 sub-200 LMK04000BISQ LMK04001BISQ LMK04002BISQ LMK04010BISQ LMK04011BISQ LMK04031BISQ LMK04033BISQ

    smd 100uf Cha

    Abstract: 5304 smd 8 pin ISPPAC-CLK5308S-01TN48I MBR120VLSFT1G RC0805JR-0710KL 100uF CHA ECS-3953M ic 5304 smd 8 pin SMD 100 6n cap DS1010
    Text: ispClock Family Handbook HB1006 Version 01.4, November 2009 ispClock Family Handbook Table of Contents November 2009 Handbook HB1006 Section I. ispClock Family Data Sheets ispClock5600A Family Data Sheet. 1-1


    Original     		PDF HB1006 HB1006 ispClock5600A ispClock5400D ispClock5300S AN6080 smd 100uf Cha 5304 smd 8 pin ISPPAC-CLK5308S-01TN48I MBR120VLSFT1G RC0805JR-0710KL 100uF CHA ECS-3953M ic 5304 smd 8 pin SMD 100 6n cap DS1010

    interfacing 8259A to the 8086

    Abstract: 80C187 80C186EC 80C186EC20 80C186EC25 80C188EC 80C188EC20 80C188EC25 80L186EC 80L188EC
    Text: 80C186EC 80C188EC AND 80L186EC 80L188EC 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS X Fully Static Operation X True CMOS Inputs and Outputs Y Integrated Feature Set Low-Power Static Enhanced 8086 CPU Core Two Independent DMA Supported UARTs each with an Integral Baud


    Original     		PDF 80C186EC 80C188EC 80L186EC 80L188EC 16-BIT 32-Bit 188EC interfacing 8259A to the 8086 80C187 80C186EC20 80C186EC25 80C188EC20 80C188EC25 80L188EC

    80C186EC20

    Abstract: intel 8086 instruction set 272332 GCS7 80c186ec
    Text: 80C186EC 80C188EC AND 80L186EC 80L188EC 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS X Fully Static Operation X True CMOS Inputs and Outputs Y Integrated Feature Set Low-Power Static Enhanced 8086 CPU Core Two Independent DMA Supported UARTs each with an Integral Baud


    Original     		PDF 80C186EC 80C188EC 80L186EC 80L188EC 16-BIT 32-Bit 188EC 80C186EC20 intel 8086 instruction set 272332 GCS7

    CY23020-3

    Abstract: CY23020LFI-3 CY23020LFI-3T
    Text: CY23020-3 10-output, 400-MHz LVPECL Zero Delay Buffer Features • • • • • • • • • • Overview 400-ps max Total Timing Budget TTB window 10 LVPECL outputs 1 LVPECL differential input Selectable output frequency range from 100 to 400 MHz


    Original     		PDF CY23020-3 10-output, 400-MHz 400-ps 15-ps 48-pin TheCY23020-3 CY23020-3 CY23020LFI-3 CY23020LFI-3T

    OSD ic

    Abstract: DIP-28C MM1381 MM1381XD MM1382 MM1382XD MM1383 MM1383XD c video na rgb B 1383
    Text: RGB Video Amplifier with OSD Input MM1381, 1382, 1383 MITSUMI RGB Video Amplifier with OSD Input Monolithic IC MM1381, 1382, 1383 Outline MM1381XD, MM1382XD and MM1383XD are wideband RGB video amplifiers with OSD input, developed for use in monitors. The main differences between them are video amp bandwidth and output rise time, and


    Original     		PDF MM1381, MM1381XD, MM1382XD MM1383XD MM1381 MM1382 MM1383 85MHz 110MHz OSD ic DIP-28C MM1381 MM1381XD MM1382 MM1383 c video na rgb B 1383

    1FN41

    Abstract: SMD code 5962-8984105LA at22v10bql-20gm V750L ATF22V10B 5962-8984106LA 5962-8984103LA V2500BQL C22V10
    Text: SMD PLDs Introduction to the SMD Product Listing Each Standardized Military Drawing SMD part number that Atmel supplies corresponds to an Atmel /883 part number. SMD products are compliant to MILSTD-883, paragraph 1.2.1 and to the requirements of the applicable standardized military drawing. The tables in


    Original     		PDF MILSTD-883, ATV750-25GM/883 22-Input, 10-Output ATV750-25NM/883 ATV750-20GM/883 1FN41 SMD code 5962-8984105LA at22v10bql-20gm V750L ATF22V10B 5962-8984106LA 5962-8984103LA V2500BQL C22V10

    kyx 28

    Abstract: hstm 421 mrf 458 MRF 530 sharc ADSP-21xxx architecture A-18 ADSP-21160 matching smit chart diode LT 675 IN 407 ADSP-21106
    Text: ADSP-21160 SHARC DSP Hardware Reference Revision 4.0, June 2009 Part Number 82-001966-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent


    Original     		PDF ADSP-21160 kyx 28 hstm 421 mrf 458 MRF 530 sharc ADSP-21xxx architecture A-18 matching smit chart diode LT 675 IN 407 ADSP-21106

    Untitled

    Abstract: No abstract text available
    Text: IA186EB/IA188EB 8-Bit/16-Bit Microcontrollers As of Production Ver. 00 April 2008 PRELIMINARY IA186EB/IA188EB 8-Bit/16-Bit Microcontrollers Data Sheet PRELIMINARY Document Version 1.2 April 2008 Copyright 2008 ENG211080314-02 Page 1 of 67 www.Innovasic.com


    Original     		PDF IA186EB/IA188EB 8-Bit/16-Bit ENG211080314-02

    LMK03033CISQE

    Abstract: LMK03000 LMK03000C LMK03000D LMK03001 LMK03001C PMOS 2160 sqa48 *1405
    Text: LMK03000 Family Precision Clock Conditioner with Integrated VCO General Description Features The LMK03000 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices


    Original     		PDF LMK03000 LMK03033CISQE LMK03000C LMK03000D LMK03001 LMK03001C PMOS 2160 sqa48 *1405

    Untitled

    Abstract: No abstract text available
    Text: Short Form Data Sheet April 2012 MAX24305, MAX24310 5- or 10-Output Any-Rate Timing ICs with Internal EEPROM General Description The MAX24305 and MAX24310 are flexible, highperformance timing and clock synthesizer ICs that include a DPLL and two independent APLLs. When


    Original     		PDF MAX24305, MAX24310 10-Output MAX24305 MAX24310 750MHz

    t300P

    Abstract: No abstract text available
    Text: HCM OS — Logic Digital Delay Units „ 10Outputs 16 pins DIP SERIES: DDU-7C Features: • Completely interfaced for HCMOS application ■ No external components required ■ P.C. board space economy achieved ■ Fits standard 16 pins DIP socket ■ Operates over commercial


    OCR Scan     		PDF 10Outputs DDU-7C-25 DDU-7C-100 DDU-7C-150 DDU-7C-200 DDU-7C-250 DDU-7C-300 DDU-7C-400 DDU-7C-500 t300P

    Untitled

    Abstract: No abstract text available
    Text: in te i 80C186EC/80C188EC AND 80L186EC/80L188EC 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Fully Static Operation H True CMOS Inputs and Outputs ■ Integrated Feature Set: — Low-Power, Static, Enhanced 8086 CPU Core — Two Independent DMA Supported


    OCR Scan     		PDF 80C186EC/80C188EC 80L186EC/80L188EC 16-BIT 32-Bit 4fl2bl75 D173341 80C186EC/188EC, 80L186EC/188EC 80C186EC/80L186EC

    Untitled

    Abstract: No abstract text available
    Text: £ Z 7 ^ 7/ SG S "T H O M S O N R LKgTTMDtEi ESM1600B QUAD COMPARATOR INTERFACE CIRCUIT . MINIMUM HYSTERESIS VOLTAGE AT EACH INPUT: 0.3V • OUTPUT CURRENT : 15 mA . LARGE SUPPLY VOLTAGE RANGE : + 10V to + 35V ■ INTERNAL THERMAL PROTECTION . INPUT AND OUTPUT CLAMPING PROTEC­


    OCR Scan     		PDF ESM1600B ESM1600B S016TBL PM-S016 0Qb703b

    Untitled

    Abstract: No abstract text available
    Text: S C S -T H O M S O N tK iw îÆ K L IO in O tM D Û i L F 3 4 7 /A /B J -F E T INPUT QUAD O P-AM Ps • LOW POWER CONSUMPTION ■ W IDE COM MON-MODE AND DIFFERENTIAL VOLTAGE RANGE ■ LOW INPUT BIAS AND OFFSET CURRENT ■ OUTPUT SHORT-CIRCUIT PROTECTION ■ HIGH INPUT IMPEDANCE J -F E T INPUT


    OCR Scan     		PDF LF347/A/B E88LF347-23 LF147/A/B LF247/A/B LF247/A/B

    qml-38535

    Abstract: CDFP4-F24 5962H9475402VXA 5962H9475401VXA
    Text: REVISIONS LTR DESCRIPTION DATE APPROVED YR-M O-DA Added changes in accordance with NOR 5962-R200-96 95-10-23 M. A. Frye Added 03 and 04 device, editorial changes through out. 96-04-29 M. A. Frye Added operational requirement for proper power-up reset. Updated


    OCR Scan     		PDF 5962-R200-96 11962H9475408VYC UT22VP10T-15WCC qml-38535 CDFP4-F24 5962H9475402VXA 5962H9475401VXA

    tibpal programming

    Abstract: PAL20L8A 8412902KX PAL20L10A PAL20R4A PAL20R6A PAL20R8A PAL20X10A PAL20X4A PAL20X8A
    Text: REVISIONS LTR DATE YR-MO-DA DESCRIPTION Convert to m ilit a r y drawing format. Add vendor CAGE 01295. Changes to tab le I . Delete subgroup 9 from fin a l e le c t r ic a l te s t parameters. Add case o u tlin e X. Added four devices 09 through 12. 1987 JUL 06


    OCR Scan     		PDF 31912KX 20R4A-2MW/8838 84129123X PAL20R4A-2ML/883B M38510/5050XBXX. 54w98 tibpal programming PAL20L8A 8412902KX PAL20L10A PAL20R4A PAL20R6A PAL20R8A PAL20X10A PAL20X4A PAL20X8A

    22V10A

    Abstract: qml-38535 22V10B
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED Updated document. Added device types 07 thru 10. Added CAGE 18324. Added L package. 94-10-17 M. A. Frye Added device types 11 thru 14. Added device class N option for some devices. Added X package, represents plastic dual-in-line. Editorial changes


    OCR Scan     		PDF MIL-BUL-103 QML-38535. QML-38535 MIL-BUL-103. JUL94 22V10A 22V10B

    C22V10

    Abstract: 1FN41 DD10 device marking 04l 5962-88670
    Text: REVISIONS LTR DESCRIPTION DATE Yn-MO-OA A Add CAGE nuifcer 5 0 3 M as a supplier for 02 and 03 device types. Add 04 device type. Add CASE nuttoer 1FM41 as a si^aplier of the K package. Editorial changes throughout entire docuaent. Remove C as a test condition option.


    OCR Scan     		PDF 1FN41 51J-296-5375. MIL-BUL-103. MIL-BUI-103 C22V10 DD10 device marking 04l 5962-88670

    22V10L

    Abstract: 596289841123a 5962-8984105LA 5962-8984103LC 5962-89841063A qml-38535 5962-8984108L 1FN41 5962-8984112LA 5962-89841
    Text: REVISIONS LTR DATE YR-MO-DA DESCRIPTION APPROVED A Added K package. Added 04 device, two suppliers and 05 device, one supplier. Added vendor CAGE 34335 for devices 0 1 L, 013, and 02L. Editorial changes throughout. Added vendor CAGE 34335 for devices 01 K, 023, and 02K. Redrawn.


    OCR Scan     		PDF 5962-R079-93. 1FN41 6S055 22V10L 596289841123a 5962-8984105LA 5962-8984103LC 5962-89841063A qml-38535 5962-8984108L 5962-8984112LA 5962-89841

    Untitled

    Abstract: No abstract text available
    Text: DEVICE SPECIFICATION IO-OUTPUT CLOCK DRIVER GENERAL DESCRIPTION The SC3518 is a minimum skew clock driver with ten outputs. It can employ a clock input from a single ended TTL or an ECL differential source operating between +5V and ground. This reference frequency input is


    OCR Scan     		PDF SC3518 SC3518S-2 SC3518S-1 28-Lead SC3518S

    Untitled

    Abstract: No abstract text available
    Text: DEVICE SPECIFICATION IO-OUTPUT CLOCK DRIVER SC3517 FEATURES GENERAL DESCRIPTION • Ten clock outputs: The SC3517 is a precision low skew clock driver with ten outputs. It requires a 2X frequency clock input from a single-ended TTL or an ECL differential source operating between +5V and ground. This 2X


    OCR Scan     		PDF 50-75il SC3517 25-unit 28-pin SC3517S-1/D