115PS Search Results

MAX3735ETG

Abstract: DS1858 MAX3735 MAX3735A MAX3735AETG MAX3735EGG
Contextual Info: 19-2529; Rev 1; 4/03 KIT ATION EVALU E L B AVAILA 2.7Gbps, Low-Power SFP Laser Drivers Features ♦ SFP Reference Design Available ♦ Fully Compliant with SFP and SFF-8472 MSAs ♦ Programmable Modulation Current from 10mA to 60mA DC-Coupled ♦ Programmable Modulation Current from 10mA to

74F74

Abstract: 74F50109 74F50728 74F50729 74F5074 I74F50729D I74F50729N N74F50729D N74F50729N Philips DN 10-5 crt
Contextual Info: INTEGRATED CIRCUITS 74F50729 Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics Product specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification

pin diode 23GHz

Abstract: laser diode chip for SFP
Contextual Info: 19-2529; Rev 2; 7/04 KIT ATION EVALU E L B AVAILA 2.7Gbps, Low-Power SFP Laser Drivers Features ♦ SFP Reference Design Available ♦ Fully Compliant with SFP and SFF-8472 MSAs ♦ Programmable Modulation Current from 10mA to 60mA DC-Coupled ♦ Programmable Modulation Current from 10mA to

74f740

Abstract: 74F5074D
Contextual Info: Philip* Semlconductora-Signetic* FAST Producto Product »pacification Synchronizing dual J - K positive edge-triggered flip-flop with metastable immune characteristics FEATURE • Pinout compatible with 74F109 • Metastable immune characteristics • Output skew guaranteed less than 1.5ns

Contextual Info: Signifies FAST 74F5074 Flip-Flop/ C lo ck Driver Document No. 853*1391 ECN No. 96491 Date of issue January 8,1990 Status Product Specification FAST Products FEATURES • Metastable Immune Characteris­ tics • Propagation delay skew and output to output skew guaranteed

ICS83947I-147

Abstract: MPC947 U131
Contextual Info: ICS83947I-147 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer and a member of HiPerClockS the HiPerClockS™ family of High Performance

mps 1132

Abstract: 83940DYI-01 ICS83940DYI-01 ICS83940I-01 MS-026
Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940I-01 DATA SHEET General Description Features The ICS83940I-01 is a low skew, 1-to-18 LVPECL-to-LVCMOS/ LVTTL Fanout Buffer. The ICS83940I-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL or SSTL input

ICS83947

Contextual Info: ICS83947I-147 LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from

zckj

Contextual Info: Signarte* Document No. 053-1390 ECN No. 98904 Date of issue February 23,1990 Status Product FAST 74F50729 Flip-Flop/Clock Driver Synchronizing Dual D-Type Flip-Flop Wlth-EdgeTiiggered Set And Reset And Metastable Immune Characteristics FAST Products FEATURES

Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940I-01 DATA SHEET General Description Features The ICS83940I-01 is a low skew, 1-to-18 LVPECL-to-LVCMOS/ LVTTL Fanout Buffer. The ICS83940I-01 has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL or SSTL input

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information VF6xx, VF5xx, VF3xx Features • Operating characteristics – Voltage range 3 V to 3.6 V – Temperature range ambient -40 °C to 85 °C • ARM Cortex A5 Core features – Up to 500 MHz ARM Cortex A5

Contextual Info: INTEGRATED CIRCUITS 74F5074 Synchronizing dual D-type flip-flop/clock driver Product specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification Synchronizing dual D-type flip-flop/clock driver FEATURES

DO14N

Abstract: DI10P DO14P DI10N TQ8025 DAD03 di00n DO13P
Contextual Info: T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ8025 DIØ–15 differential PECL/CML Input Buffers PRELIMINARY DATA SHEET 32 16 x 16 Crosspoint Switch Matrix PECL/CML Output Buffers DOØ–15 (differential) 16 x 4 RESET– LDMODE CONFIG ADD15 Configuration

DS1858

Abstract: MAX3735 MAX3735A MAX3735AETG MAX3735EGG MAX3735ETG
Contextual Info: 19-2529; Rev 2; 7/04 KIT ATION EVALU E L B AVAILA 2.7Gbps, Low-Power SFP Laser Drivers Features ♦ SFP Reference Design Available ♦ Fully Compliant with SFP and SFF-8472 MSAs ♦ Programmable Modulation Current from 10mA to 60mA DC-Coupled ♦ Programmable Modulation Current from 10mA to

Philips DN 10-5 crt

Contextual Info: P hilips Semico nductor*-S ign«tic» FAST Product« Product •p a cification Synchronizing dual D-type flip-flop with edge-triggered set and reset and metastable immune characteristics FEATURES DESCRIPTION • Metastable immune characteristics The 74F50729 is a dual positive

74F50109

Abstract: 74F5074 74F74 74F109 74F50728 74F50729 N74F50109D N74F50109N
Contextual Info: INTEGRATED CIRCUITS 74F50109 Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics Product specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification Synchronizing dual J–K positive edge-triggered

Contextual Info: Product specification Philips Semico nductors-Slgnetlcs FAST Products Synchronizing cascaded dual positive edge74^*079« triggered D-type FEATURES DESCRIPTION • Metastable immune characteristics The 74F50728 is a cascaded dual positive

Signetics

Contextual Info: MILITARY FAST PRODUCTS 54F5074 Synchronizing dual D-type flip-flop with metastable immune characteristics Product Specification April 15,1992 Signetics Philips Semiconductors PHILIPS PHILIPS Product specification Signetics Military FAST Products Synchronizing dual d-type flip-flop with

Contextual Info: ICS83947I-147 LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from

ER-001

Abstract: CRC32 ER001 CRC32-C HLP1 CRC-32C CRC32C
Contextual Info: Tsi110TM Device Errata 80E5000_ER001_03 October 28, 2009 6024 Silver Creek Valley Road San Jose, California 95138 Telephone: 408 284-8200 • FAX: (408) 284-3572 Printed in U.S.A. 2009 Integrated Device Technology, Inc. Titlepage GENERAL DISCLAIMER

74f74

Contextual Info: Product specification Philips Semiconductors-Signetics FAST Products Synchronizing dual D-type flip-flop with edge-triggered set and reset and metastable immune characteristics FEATURES DESCRIPTION • Metastable immune characteristics The 74F50729 is a dual positive

74F50109

Abstract: 74F50728 74F50729 74F5074 I74F50728D I74F50728N N74F50728D N74F50728N
Contextual Info: INTEGRATED CIRCUITS 74F50728 Synchronizing cascaded dual positive edge-triggered D-type flip-flop Positive specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification Synchronizing cascaded dual positive

Philips DN 10-5 crt

Abstract: 74F74 74F50109 74F50728 74F50729 74F5074 N74F5074D N74F5074N
Contextual Info: INTEGRATED CIRCUITS 74F5074 Synchronizing dual D-type flip-flop/clock driver Product specification IC15 Data Handbook Philips Semiconductors 1990 Sep 14 Philips Semiconductors Product specification Synchronizing dual D-type flip-flop/clock driver FEATURES

Contextual Info: 19-2529; Rev 2; 7/04 KIT ATION EVALU E L B AVAILA 2.7Gbps, Low-Power SFP Laser Drivers Features ♦ SFP Reference Design Available ♦ Fully Compliant with SFP and SFF-8472 MSAs ♦ Programmable Modulation Current from 10mA to 60mA DC-Coupled ♦ Programmable Modulation Current from 10mA to