128-PIN PQFP Search Results

AE 2576

Abstract: 272-ball 304-pin dimensions bga
Contextual Info: Package Diagrams Index of Package Diagrams 120-Pin PQFP . 128-Pin PQFP . 128-Pin TQFP .

lsc 3120

Abstract: ispLSI 1015
Contextual Info: Package Diagrams Index of Package Diagrams 120-Pin PQFP . 128-Pin PQFP . 128-Pin TQFP .

PKG03

Abstract: Lattice Package Dia lsc 3120 lattice 24 pin plastic dip dimensions
Contextual Info: Package Diagrams Index of Package Diagrams 120-Pin PQFP . 12 128-Pin PQFP . 12 128-Pin TQFP . 13

PACKAGE DIMENSIONS

Contextual Info: Package Diagrams Index of Package Diagrams 100-Ball caBGA Package . 12 120-Pin PQFP Package . 12 128-Pin PQFP Package . 13 128-Pin TQFP Package . 13

VT6308P

Abstract: VT6307 VT6306 VT6308S VT6308 VT6306L VT6307S LQFP128 1394a link
Contextual Info: Process VT6306 VT6306L VT6307 VT6307L VT6307S VT6308P VT6308S 0.3 0.3 0.3 0.3 0.3 0.5 0.4 Package Pin Count Dimension PQFP LQFP PQFP LQFP LQFP PQFP LQFP 128 14x20 128 14×20 128 14×20 128 14×20 128 14×14 128 14×20 128 14×14 Port 3 3 2 2 2 2 2 Spec 1394a PCI Host

Contextual Info: PA1048-T128-01A Data Sheet 128 pin TQFP socket/28 pin DIP 0.6" plug Supported Device/Footprints Adapter Wiring Using this adapter several 128 pin Lattice devices in TQFP packages can be programmed on 28 pin DIP programmers. This socket will only work for the TQFP package.

PC87360

Abstract: rc-6 protocol PC87911 PC99 8042AH N82077 RC5 protocol
Contextual Info: PC87360 128-Pin LPC SuperI/O with Protection and Extensive GPIO Support General Description Outstanding Features The PC87360 is the first member of National Semiconductor’s 128-pin SuperI/O family to support the Low Pin Count LPC interface. It provides features to protect the system

lad1 12vdc

Abstract: midi to game port cable mouse sigma 500 tsi pro ms 8042AH MPU-401 N82077 PC87366 PC87911 PC99
Contextual Info: January 11, 1999 PC87366 128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports General Description Outstanding Features The PC87366, a member of National Semiconductor’s 128-pin LPC SuperI/O family, combines National’s System Hardware

8042AH

Abstract: N82077 PC87360 PC87911 PC99 w 3425 0AH12
Contextual Info: January 10, 1999 PC87360 128-Pin LPC SuperI/O with Protection and Extensive GPIO Support General Description Outstanding Features The PC87360 is the first member of National Semiconductor’s 128-pin SuperI/O family to support the Low Pin Count LPC interface. It provides features to protect the system

musical SCANNING KEYBOARD schematic

Abstract: lad1 12vdc 8042AH MPU-401 N82077 PC87366 PC87911 PC99 pc8732 schematic diagram intel motherboard
Contextual Info: PC87366 128-Pin LPC SuperI/O with System Hardware Monitoring and MIDI and Game Ports General Description Outstanding Features The PC87366, a member of National Semiconductor’s 128-pin LPC SuperI/O family, combines National’s System Hardware Monitoring capability with a Musical Instrument Digital Interface

C3468

Abstract: 100-PIN C346 CY7C346
Contextual Info: CY7C346 CYPRESS 128-Macrocell MAX EPLD Features • • • • • 128 macrocells in 8 LABs 20 dedicated inputs, up to 64 bidirectional I/O pins Programmable interconnect array 0.8-micron double-metal CMOS EPROM technology Available in 84-pin CLCC, PLCC, and 100-pin PGA,

322267

Abstract: MX93111 IPT84 MX93111 FC MX93011C
Contextual Info: MX93111 MX93111 DATA SHEET CONTENT 1 INTRODUCTION 1.1 FEATURE 1.2 DIFFERENCE BETWEEN MX93011C AND MX93111 2 3 2 PIN 2.1 2.2 2.3 2.4 2.5 PIN OUT FOR 128 PIN PQFP MX93111 PIN DESCRIPTIONS PIN TYPE ABBREVIATION PINS SUMMARY BY PIN TYPE MULTIPLEX PINS 4 6 9 9

TME 87

Abstract: 100-PIN CY7C346B F13H1
Contextual Info: CY7C346B CYPRESS — 128-Macrocell MAX EPLD Features • • • • 128 macrocells in 8 LABs 20 dedicated inputs, up to 64 bidirectional I/O pins Programmable interconnect array Advanced 0.65-micron CMOS technology to increase performance • Available in 84-pin CLCC, PLCC, and 100-pin PGA,

MX93132

Abstract: OPT19 mx93111 10k sip resister MXIC DSP ADD mxic dsp instruction set
Contextual Info: MX93132 MX93132 DATA SHEET CONTENT 1 INTRODUCTION 1.1 FEATURE 1.2 DIFFERENCE BETWEEN MX93011C AND MX93132 2 3 2 PIN 2.1 2.2 2.3 2.4 2.5 2.6 PIN OUT FOR 128 PIN PQFP MX93132 PIN DESCRIPTIONS PIN TYPE ABBREVIATION PINS SUMMARY BY PIN TYPE MULTIPLEX PINS I/O PORT INTERNAL CIRCUIT

Contextual Info: Lattica ;Semiconductor ICorporation Features ispLSI 2128V 3.3V High Density Programmable Logic Functional Block Diagram* • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 6000 PLD Gates 128 and 64 I/O Pin Versions, Eight Dedicated Inputs 128 Registers

EPF6024A

Contextual Info: EPF6024A Device Pin-Outs ver. 1.0 Pin Name 1 144-Pin TQFP EPF6024A 208-Pin PQFP EPF6024A 240-Pin PQFP EPF6024A 256-Pin BGA EPF6024A 256-Pin FineLine BGA EPF6024A MSEL (2) 33 46 52 T3 L5 nSTATUS (2) 56 80 92 W11 K8 nCONFIG (2) 53 77 89 Y11 N8 DCLK (2) 128

EPM5130

Abstract: EPM5130A-15 74N10
Contextual Info: EPM5130 EPLD Features • ■ ■ ■ ■ ■ ■ ■ ■ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture

EPF6016

Abstract: 216 C9 T20 ver 2
Contextual Info: EPF6016 Device Pin-Outs ver. 1.0 Pin Name 1 144-Pin TQFP EPF6016 208-Pin PQFP EPF6016 240-Pin PQFP EPF6016 256-Pin BGA EPF6016 MSEL (2) 33 46 52 T3 nSTATUS (2) 56 80 92 W11 nCONFIG (2) 53 77 89 Y11 DCLK (2) 128 184 212 C10 CONF_DONE (2) 105 150 172 E18 INIT_DONE (3)

EPM5130

Abstract: EPM5130A-20 KSD 101-G EPM5130A-15 100-Pin Package Pin-Out Diagram 4536C
Contextual Info: EPM 5130 EPLD Features • ■ ■ ■ ■ ■ ■ ■ ■ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easilyintegrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture

PQFP ALTERA 160

Abstract: EPM3256A
Contextual Info: EPM3256A Dedicated Pin-Outs ver. 1.0 Dedicated Pin 144-Pin TQFP 208-Pin PQFP INPUT/GCLK1 INPUT/GCLRn INPUT/OE1 INPUT/OE2/GCLK2 TDI 1 TMS (1) TCK (1) TDO (1) GNDINT GNDIO VCCINT (3.3 V Only) VCCIO (2.5 V or 3.3 V) No Connect (N.C.) 125 127 126 128 4 20 89

EPM5130

Abstract: 100-Pin Package Pin-Out Diagram D2-3401 EPM 5130
Contextual Info: EPM5130 EPLD □ □ Features □ □ □ □ □ □ □ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 m acrocells optim ized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture

EPM5130

Abstract: D1398
Contextual Info: EPM 5130 EPLD High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture tPD as fast as 15 ns Counter frequencies up to 83.3 MHz

Contextual Info: K 1 ' f « '' '1 ^ mi’ V ü.1: ÜII I C' I ». C OR GENERAL INFORMATION Case Information MOTOROLA 2-22 84-Pin PLCC CASE 780-01 PI SUFFIX 160-Pin nCQFP CASE 864D-02 MZ SUFFIX 128-Pin PQFP CASE 862A-01 DD SUFFIX 208-Pin FQFP CASE 872D-01 DK SUFFIX 160-Pin PQFP

CZ09

Abstract: SFE8 P255C
Contextual Info: iîiLattice ispLSI" 2128V " ü ü S em icondu ctor • *•■■■ C orporation Features • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 6000 PLD Gates 128 and 64 I/O Pin Versions, Eight Dedicated Inputs 128 Registers High Speed Global Interconnect