138FK Search Results

Contextual Info: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception

Contextual Info: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception

ESM 740

Abstract: transistor SMD t04 51 D245A LM2804 transistor SMD t04 Solar Garden Light Controller 4 pin 2fu smd transistor transistor t04 smd pnp Octal Darlington Transistor Arrays DIP WB126
Contextual Info: 2004-3 PRODUCT GUIDE General-Purpose Surface-Mount Devices semiconductor 2004 http://www.semicon.toshiba.co.jp/eng Greeting from Toshiba Toshiba Corporation has developed and provided key devices such as information equipment and information appliance, employing the most advanced technology.

Contextual Info: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception

JM38510/01405BEA

Abstract: sn74ls138n LS138 texas M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 76005012A ACTIVE LCCC FK 20 1

Contextual Info: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS258L − DECEMBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

Contextual Info: SN54HCT138, SN74HCT138 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS SCLS171E − MARCH 1984 − REVISED SEPTEMBER 2003 D D D D D D Low Input Current of 1 µA Max D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed Operating Voltage Range of 4.5 V to 5.5 V

Contextual Info: SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M − DECEMBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

SNV54HC138W

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Targeted Specifically for High-Speed D D D D D D D Memory Decoders and Data-Transmission Systems Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS258L − DECEMBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

Contextual Info: SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M − DECEMBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

Contextual Info: SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M − DECEMBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

SN74HCT138N

Abstract: HT138
Contextual Info: SN54HCT138, SN74HCT138 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS SCLS171E − MARCH 1984 − REVISED SEPTEMBER 2003 D D D D D D Low Input Current of 1 µA Max D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed Operating Voltage Range of 4.5 V to 5.5 V

Contextual Info: SN54F138, SN74F138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDFS051B – MARCH 1987 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Targeted Specifically for High-Speed D D D D D D D Memory Decoders and Data-Transmission Systems Wide Operating Voltage Range of 2 V to 6 V

SN54ALS138

Contextual Info: SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Targeted Specifically for High-Speed D D D D D D D Memory Decoders and Data-Transmission Systems Wide Operating Voltage Range of 2 V to 6 V

JM38510/01405BEA

Abstract: M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 76005012A ACTIVE LCCC FK 20

HC138

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Targeted Specifically for High-Speed D D D D D D D Memory Decoders and Data-Transmission Systems Wide Operating Voltage Range of 2 V to 6 V

ahc138

Contextual Info: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS258L − DECEMBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify

SN54ALS138

Contextual Info: SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Targeted Specifically for High-Speed D D D D D D D Memory Decoders and Data-Transmission Systems Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: SN54HCT138, SN74HCT138 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS SCLS171E − MARCH 1984 − REVISED SEPTEMBER 2003 D D D D D D Low Input Current of 1 µA Max D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed Operating Voltage Range of 4.5 V to 5.5 V

Contextual Info: SN54HCT138, SN74HCT138 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS SCLS171E − MARCH 1984 − REVISED SEPTEMBER 2003 D D D D D D Low Input Current of 1 µA Max D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed Operating Voltage Range of 4.5 V to 5.5 V