15JAN2001 Search Results

Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of

M68x

Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of

M48Z512A

Abstract: M48Z512AV M48Z512AY M48Z512BV
Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of

68EZ328

Abstract: ISP1161 LQFP64 MC68EC000 MC68EZ328 SH7709
Contextual Info: Philips Semiconductors Connectivity August 2001 Application Note Interfacing ISP1161 to Motorola DragonBall  EZ RISC Processor Rev 1.0 Philips Semiconductors - Asia Product Innovation Centre