15NSTPO Search Results
15NSTPO Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: FINAL COM’L: -15/20, Q-25 a MACH435-15/20, Q-25 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Up to 20 product terms per function, with XOR ■ 128 Macrocells ■ Flexible clocking ■ 15nstpo |
OCR Scan |
MACH435-15/20, 15nstpo PAL33V16â MACH130, MACH230 25752b | |
Contextual Info: INTEGRATED CIRCUITS m m s ^ e eI It Xiiinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family, For more technical or sales information, please see: www.xilinx.com XCR5128 128 macrocell CPLD Product specification Supersedes data of 1997 Aug 12 |
OCR Scan |
XCR5128 PZ5128 PZ5128 OT322-2 M0112DD1 | |
Contextual Info: INTEGRATED CIRCUITS im m l y i E I TI Xilinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family, For more technical or sales information, please see: www, xilin i* com XCR3128 128 macrocell CPLD Product specification Supersedes data of 1997 Aug 12 |
OCR Scan |
XCR3128 PZ3128 PZ3128 OT322-2 M0112DD1 | |
Contextual Info: PRELIMINARY COM’L: -15/20 ZI MACH355-15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 144 Pins In PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, In-circuit programmable ■ Flexible clocking |
OCR Scan |
MACH355-15/20 15nstpo PAL33V16â 25752b | |
mach 1 family amd
Abstract: MACH110
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OCR Scan |
MACH215 I/O8-I/O15 C16751C-1 MACH215-12/15/20 mach 1 family amd MACH110 | |
Contextual Info: COM’L AmPAL18P8B/AL/A/L Advanced Micro Devices 20-Pin Combinatorial TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 15 ns maximum propagation delay ■ Universal combinatorial architecture ■ Programmable output polarity ■ Programmable replacement for high-speed |
OCR Scan |
AmPAL18P8B/AL/A/L 20-Pin AmPAL18P8 KS000010-PAL 2350-019A 2984-006A | |
Contextual Info: ADVANCE INFORMATION COM’L: -15/20 Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 132 Pins In PQFP ■ Flexible clocking ■ 96 Macrocells — Four global clock pins with selectable edges — Asynchronous mode available for each |
OCR Scan |
MACH355-15/20 15nstpo PAL33V16â MACH355 025752b GQ3434S | |
PALCE22V100-25Contextual Info: FINAL COM’L: H-5/7/10/15/25,0-10/15/25 IND: H-10/15/20/25 Advanced Micro Devices PALCE22V10 Family 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • As fast as 5-ns propagation delay and 142.8 MHz fMAx external Global asynchronous reset and synchronous |
OCR Scan |
H-5/7/10/15/25 H-10/15/20/25 PALCE22V10 24-Pin PALCE22V100-25 |