16K 115 Search Results

CY7C006A

Abstract: CY7C007A CY7C016A CY7C017A
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x8, 32K/16K x9 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • 16K x 8 organization CY7C006A

CY7C006A

Abstract: CY7C007A CY7C016A CY7C017A CY7C006A-20AXI
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 16K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x 8, 16K x 9 Dual-Port Static RAM Features • Automatic power-down • True dual-ported memory cells which allow simultaneous access of the same memory location

ftr 02

Abstract: F.TR.02 19 IDT BH package marking marking a7r
Contextual Info: AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V/89V 4K/8K/16K/32K/64K x 18 AL5DS9269V/79V/89V 16K/32K/64K x 16 AL5DS9149V/59V/69V/79V/89V/99V 4K/8K/16K/32K/64K/128K x 9 AL5DS9069V/79V/89V/99V 16K/32K/64K/128K x 8 Preliminary AL5DS9xx9V

ST9027

Abstract: ST90T27 hlx 12Mhz crystal oscillator PDIP40 PLCC44 ST9028 ST90R28 ncp54 clcc44 ST92 40
Contextual Info: ST9027, ST9028  16K ROM / 256 RAM HCMOS MCUs Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal Internal Memory : ROM RAM ST9027 16K 256 ST9028 16K 256 224 general purpose registers available as RAM,

SEM 2005 16 PINS

Abstract: sem 2005 CYPRESS CROSS REFERENCE dual port sram sem 2005 16 pin CY7C006A CY7C007A CY7C016A CY7C017A TPD16-3
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x8, 32K/16K x9 Dual-Port Static RAM Features • Automatic power-down • True dual-ported memory cells which allow simultaneous access of the same memory location

A12L

Abstract: A13L CY7C006 CY7C016 TSOP 48 memory arbitration scheme C0066
Contextual Info: with Sem, In t, Busy CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True dual-ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

A12L

Abstract: A13L CY7C006 CY7C016 C0066
Contextual Info: with Sem, In t, Busy CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

CY7C006

Abstract: CY7C016
Contextual Info: fax id: 5207 1 CY7 C0 16 CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

Contextual Info: SGS-THOMSON ST9020 ST9027, ST9028 IL[ 12/16K ROM HCM O S MCUs Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal Internal Memory: ROM RAM ST9020 12K ST9027 16K 256 ST9028 16K 256 224 general purpose registers available as RAM,

A13L

Abstract: CY7C026A CY7C036A IDT70261 014L
Contextual Info: V CYPRESS CY7C026A CY7C036A PRELIMINARY 16K x 16/18 Dual-Port Static RAM Features True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location 16K x 16 organization CY7C026A 16K x 18 organization (CY7C036A) 0.35-micron CMOS for optimum speed/power

c0067

Abstract: A13L CY7C006 CY7C016 IDT7006 IDT7016
Contextual Info: CY7C006 CY7C016 PRELIMINARY 16K x 8/9 DualĆPort Static RAM with Sem, Int, Busy Features Functional Description D D The CY7C006 and CY7C016 are highĆ speed CMOS 16K x 8 and 16K x 9 dualĆ port static RAMs. Various arbitration schemes are included on the CY7C006/016 to handle situations when

Tantalum Chip Capacitor 107 16K

Abstract: A106C D4321
Contextual Info: m os IMS IMS IMS IMS IMS IMS 1605: 64K 1625: 16K 1629: 16K 1626/7:16K 1635: 8K 1695: 8K x1 x4 x 4 with Output Enable x 4 with Separate l/Os x8 x9 FEATURES • INMOS' Very High Speed Double Melal CMOS • Advanced Process-1.2 Micron Design Rules • 64K Bit Devices

Contextual Info: MN103E010HRA, MN103E040HYB MN103E010HRA Type MN103E040HYB Instruction Cashe byte 16K (4-way, set-associative) Data Cashe (byte) SRAM Used by Both Instructions and Data(byte) Package (Lead-free) Minimum Instruction Execution Time 16K (4-way, set-associative)

A814 023

Abstract: 8051 Keyboard Controller
Contextual Info: Ä m K l© I 8XC51SL/LOW VOLTAGE 8XC51SL KEYBOARD CONTROLLER 80C51SL — CPU with RAM and I/O; Vcc = 5V ± 10% 81C51SL— 16K ROM Preprogrammed with SystemSoft Keyboard Controller and Scanner Firmware. Vcc = 5V ± 10%. 83C51SL — 16K Factory Programmed ROM. Vcc = 5V ± 10%87C51SL — 16K OTP ROM. Vcc = 5V ± 10%.

Contextual Info: Features * Low Voltage Operation - 2.7V Read - 5V Program/Erase * Fast Read Access Time -120 ns * Internal Erase/Program Control * Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 8K Words (16K bytes) Parameter Blocks

Contextual Info: MN103E01, MN103E04 Series MN103E010HRA Type MN103E040HYB Instruction Cashe byte 16K (4-way, set-associative) Data Cashe (byte) SRAM Used by Both Instructions and Data(byte) Package (Lead-free) Minimum Instruction Execution Time 16K (4-way, set-associative)

Contextual Info: Features * Single Voltage Operation - 5V Read - 5V Reprogramming * Fast Read Access Time - 70 ns * Internal Erase/Program Control * Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 8K Words (16K bytes) Parameter Blocks

a935

Abstract: B935 CY7C43634V CY7C43644 CY7C43644AV CY7C43664AV CY7C43684AV CY7C436X4AV
Contextual Info: CY7C43634V CY7C43664AV1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching 13 CY7C43644AV CY7C43664AV CY7C43684AV PRELIMINARY 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features • Fully asynchronous and simultaneous read and write

a12I

Contextual Info: Features * Low Voltage Operation - 2.7V Read - 5V Program/Erase * Fast Read Access Time -120 ns * Internal Erase/Program Control * Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 8K Words (16K bytes) Parameter Blocks

Contextual Info: Features * Low Voltage Operation - 2.7V Read - 5V Program/Erase * Fast Read Access Time -120 ns * Internal Erase/Program Control * Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 8K Words (16K bytes) Parameter Blocks

A13L

Abstract: CY7C09269A CY7C09369A IDT709269
Contextual Info: 1 CY7C09269A CY7C09369A 16K x16/18 Synchronous Dual Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • Two Flow-Through/Pipelined devices — 16K x 16/18 organization CY7C09269A/369A

CY7C43632

Abstract: CY7C43642 CY7C43662 CY7C43682 CY7C436X2
Contextual Info: CY7C43632 CY7C43662256/512/1K/4K/16K x36 x2 Bidirectional Synchronous FIFO 1CY7C43662 CY7C43642 CY7C43662 CY7C43682 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO Features • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO

MOSTEK 36000

Abstract: 3861 mostek MK2408P MK2500P
Contextual Info: CONTENTS I. Functional/Numerical Index II. Shift Registers III. Read Only Memories 16K ROMs 32K ROMs 64K ROMs Programmable ROMs Random Access Memories 4K Dynamic RAMs 16K Dynamic RAMs 4K Static RAMs IV. V. Application Information VI. Packaging VII. Reliability Information

393770

Abstract: CY7C037V CY7C056V CY7C057V
Contextual Info: CY7C056V CY7C057V CY7C037V CY7C038V3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM CY7C056V CY7C057V 3.3V 16K/32K x 36 FLEx36™ Asynchronous Dual-Port Static Features • On-Chip arbitration logic • True dual-ported memory cells that allow simultaneous