1734 DUALPORT Search Results

J-A2R

Abstract: TTL 7042 logic symbol
Contextual Info: INTEGRATE» M7E DEVICE » • MÖ2S771 000=1734 ß « I D T IDT7132SA/LA IDT7142SA/LA CMOS DUAL-PORT RAM 16K 2K x 8-BIT T -M b -2 3 -1 2 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed access — Military: 25 /30/3 5 /4 5 /5 5 /7 0 /9 0 /1 0 0 /1 20ns (max.)

DSP1618

Abstract: DSP1627 DSP1628 1734 DUALPORT
Contextual Info: Microelectronics Product Note March 1996 DSP1628 Digital Signal Processor Features • Optimized for digital cellular applications such as half-rate and enhanced full-rate GSM, with a bit manipulation unit and an error correction coprocessor for higher signal coding efficiency

DSP1620

Contextual Info: Product Note April 1997 DSP1620 Digital Signal Processor Features • ■ ■ Optimized for digital cellular infrastructure applications—equalization, channel coding, speech coding — Large, on-chip RAM 32 Kwords that eliminates need for fast external SRAM

DSP1618

Abstract: DSP1616 DSP1618 eccp
Contextual Info: Microelectronics Product Note March 1996 DSP1618x16 Digital Signal Processor DSP1618x24 Digital Signal Processor Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Optimized for digital cellular applications with a bit manipulation unit and an error correction coprocessor for higher signal coding efficiency

powerflex 753 programming manual

Abstract: 1734-IE8C 1783-ETAP 1734-IE4C 2711PC-T10C4D1 powerflex 753 1734-OE4C 1794-TB3G 1734-IE2C 1734-OB8
Contextual Info: Selection Guide Integrated Architecture for Midrange Machine Applications What’s Inside Topic Page Typical Configurations Standalone Machine 7 Midsize Machine 8 Process Skid 9 Indexing Motion 10 Integrated Motion and Integrated Safety 11 Integrated Architecture Products

ab244

Abstract: DPRAM DB10 DSP1618 DSP1627 DSP1628 54218 36k DSP1600 lucent
Contextual Info: Advance Information January 1997 DSP1628x16 Digital Signal Processor DSP1628x08 Digital Signal Processor Features • Optimized for digital cellular applications with a bit manipulation unit and an error correction coprocessor ECCP for higher signal coding efficiency

"Single-Port RAM"

Abstract: PIC 8 F 77 OR2C04A
Contextual Info: Data Addendum July 1997 microelectronics group 3 r Lucent Technologies Bell Labs Innovations ORCA OR2CXXA 5.0 V and OR2TxxA (3.3 V) Series Field-Programmable Gate Arrays Features • Flip-flop/latch options to allow programmable prior­ ity of synchronous set/reset vs. clock enable

embedded system projects

Abstract: 78hc705 INSTRUCTION SET motorola 6800 Motorola 68HC11F1 68HC711D3 M68HC11E20 embedded system projects pdf free download 68hc811e2 motorola 6800 assembly language guide M68HC705KICS
Contextual Info: SG180/D Rev. 1 Development Tools Selector Guide June 1997 How to reach us USA/Europe/locations not listed Motorola Literature Distribution PO Box 5405 Denver, Colorado 80217 303 675 2140 or 800 441 2447 Internet http://www.mcu.motsps.com Japan Nippon Motorola Ltd.

powerpc 405

Abstract: CHN 628 marking code H5C SMD Transistor mac 7a8 transistor PowerISA 203
Contextual Info: MPC5744P Reference Manual Document Number: MPC5744PRM Rev. 2, 06/2013 Preliminary MPC5744P Reference Manual, Rev. 2, 06/2013 2 Preliminary Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1 Preface 1.1

DIAB

Abstract: 78hc705 M68HC812A4 68HC705JICS MEVB1632 gunk PEP Modular Computers GmbH PEP Modular computer D24-D32 M68HC705J2PGMR
Contextual Info: M M O T O R O L A SG I 80/D Rev. 1 e c Selector Guide July 1997 M ) MOTOROLA How to reach us USA/Europe/locations not listed Motorola Literature Distribution PO Box 5405 Denver, Colorado 80217 303 675 2140 or 800 441 2447 Internet Japan http://www.mcu.motsps.com

PCI 6601

Abstract: 974-1021 EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 SSTL-18
Contextual Info: 5. DC & Switching Characteristics SII51005-4.3 Operating Conditions Stratix II devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grades and commercial devices are offered in -3 fastest , -4, -5 speed grades.

EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90 SSTL-18 Pin Out For EP2S15
Contextual Info: 5. DC & Switching Characteristics SII51005-4.4 Operating Conditions Stratix II devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grades and commercial devices are offered in -3 fastest , -4, -5 speed grades.

336 16k 030

Abstract: LVDS fin 1002 Altera Quartus II v.11.0
Contextual Info: 5. DC & Switching Characteristics SII51005-4.5 Operating Conditions Stratix II devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grades and commercial devices are offered in -3 fastest , -4, -5 speed grades.

MA1567

Abstract: S 1854 SDH 209 2272 DECODER HD-SDI over sdh linear handbook LVDS fin 1002 tms 1944 tms 1944 an 22 GR-253-CORE
Contextual Info: 4. DC and Switching Characteristics SIIGX51006-4.6 Operating Conditions Stratix II GX devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grade and commercial devices are offered in -3 fastest , -4, and -5 speed grades.

TL 2272 DECODER

Abstract: PRBS23 PRBS31 tl 3042 MA1567
Contextual Info: 4. DC and Switching Characteristics SIIGX51006-4.4 Operating Conditions Stratix II GX devices are offered in both commercial and industrial grades. Industrial devices are offered in -4 speed grade and commercial devices are offered in -3 fastest , -4, and -5 speed grades.

car ignition circuit diagram immobiliser

Abstract: HC11EA9 MC68HC916P1 68hc912b32 pinout HC11K4 HC11KA2 HC11KA4 HC11KW1 HC11P2 HC11A8
Contextual Info: Cover Customer E.M.U. Rev. 6 Page 1 Table of Contents World-wide Capability 3 Motorola Technical training 4 MCU Quick Reference Tables 5–15 Family Selector Guides 68HC05Bx 68HC05BDx/BSx 68HC05Cx 68HC05Dx 68HC05Ex 68HC05Fx 68HC05Gx/Hx 68HC05Jx 68HC05JP/JJx

EP2S60F

Abstract: OV 5642 27631 VHDL fpga stratix II ep2s180
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC

bst 1046

Abstract: Datasheet Library 1979 S 1854 8 bit Array multiplier code in VERILOG class 10 up board Datasheet 2012 CMOS applications handbook sensor 3414 vhdl code for FFT 32 point EP2S15 EP2S180
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC

QDR pcb layout

Abstract: verilog code fo fft algorithm
Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.5 Copyright 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

8 bit Array multiplier code in VERILOG

Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SII5V1-4.1 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SII5V1-4.2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

EP2S30

Abstract: EP2S60 EP2S90 EP2S15 EP2S180 I747 verilog code fo fft algorithm 16 bit Array multiplier code in VERILOG TI 783
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC

General Electric Semiconductor Data Handbook

Abstract: D 1609 VO A1 Datasheet Library 1979 S 1854 bst 1046 class 10 up board Datasheet 2012 CMOS applications handbook d 1878 DATA SHEET sensor 3414 toggle switches 2041 BY
Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90 A 27631 transistor
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC