17MAY2005 Search Results

Contextual Info: BurrĆBrown Products from Texas Instruments ADS7864 SBAS141A – SEPTEMBER 2000 – REVISED MARCH 2005 500kHz, 12-Bit, 6-Channel Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION • • • • • • • • The ADS7864 is a dual 12-bit, 500kHz

QFN-10

Abstract: MARKING AMN TPS62300 TPS62301 TPS62302 TPS62303 TPS62303YZD TPS62305 TPS62320 TPS62321
Contextual Info: QFN-10 TPS62300, TPS62301, TPS62302 TPS62303, TPS62305 TPS62320, TPS62321 CSP-8 www.ti.com SLVS528A – JULY 2004 – REVISED JULY 2004 500-mA, 3-MHz SYNCHRONOUS STEP-DOWN CONVERTER IN CHIP SCALE PACKAGING FEATURES Up to 93% Efficiency at 3-MHz Operation Up to 500-mA Output Current at VI = 2.7 V

STG3690

Abstract: STG3690QTR STG3690TTR TSSOP16 TL 2336
Contextual Info: STG3690 LOW VOLTAGE 5Ω MAX QUAD SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 0.3ns TYP. at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V ULTRA LOW POWER DISSIPATION: ICC = 0.2µA (MAX.) at TA = 85°C LOW "ON" RESISTANCE VIN=0V:

54VCXH162373

Abstract: RHFXH162373K-01V RHRXH162373K-01V RHRXH162373K-02V
Contextual Info: 54VCXH162373 Rad hard low voltage CMOS 16-bit D-type latch 3-state with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed: – tPD = 3.3ns (Max) at VCC = 3.0 to 3.6V – tPD = 4.5ns (Max) at VCC = 2.3 to 2.7V ■

Contextual Info: THS8083A95 Triple 8ĆBit, 95 MSPS, 3.3ĆV Video and Graphics Digitizer With Digital PLL Data Manual May 2004 Digital Audio Video SLAS348A IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

Contextual Info: TS5A23157 DUAL 10ĆW SPDT ANALOG SWITCH www.ti.com SCDS165 A − MAY 2004 − REVISED MARCH 2005 DESCRIPTION The TS5A23157 is a dual, single-pole, double-throw SPDT analog switch designed to operate from 1.65 V to 5.5 V. This device can handle both digital and analog

5000F

Contextual Info: TLV320AIC20, TLV320AIC21 TLV320AIC24, TLV320AIC25 TLV320AIC20K, TLV320AIC24K www.ti.com SLAS363D – MARCH 2002 – REVISED APRIL 2005 Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC FEATURES • • • • • • • • Stereo 16-Bit Oversampling Sigma-Delta A/D

Contextual Info: SN74LVC1G3157 SINGLEĆPOLE, DOUBLEĆTHROW ANALOG SWITCH SCES424D − JANUARY 2003 - REVISED APRIL 2005 D 1.65-V to 5.5-V VCC Operation D Useful for Both Analog and Digital D D D D D D D DBV, DCK, OR DRL PACKAGE TOP VIEW Applications Specified Break-Before-Make Switching

Contextual Info: SN54LV4053A, SN74LV4053A TRIPLE 2ĆCHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 2Y1 2Y0 3Y1 3-COM 3Y0 INH GND GND 15 3 14 4 13 5 12 6 11 7 10 8 9 2Y0 3Y1 3-COM 3Y0 INH GND VCC 2-COM 1-COM 1Y1 1Y0 A B C 1 16 2 15 3

Contextual Info: LM285Ć2.5, LM385Ć2.5, LM385BĆ2.5 MICROPOWER VOLTAGE REFERENCES SLVS023J − JANUARY 1989 − REVISED MARCH 2005 D Operating Current Range . . . 20 µA to D D D D D LM285-2.5 . . . D PACKAGE LM385-2.5, LM385B-2.5 . . . D OR PW PACKAGE TOP VIEW 20 mA 1.5% and 3% Initial Voltage Tolerance

SN75107

Contextual Info: SN55110A, SN75110A, SN75112 DUAL LINE DRIVERS SLLS106G − DECEMBER 1975 − REVISED NOVEMBER 2004 D Improved Stability Over Supply Voltage and D D D D Temperature Ranges Constant-Current Outputs High Speed Standard Supply Voltages High Output Impedance High Common-Mode Output Voltage Range

Contextual Info: TLK2701 1.6 TO 2.7 GBPS TRANSCEIVER SLLS429C – AUGUST 2000 – REVISED JULY 2003 D D D D D D D 1.6 to 2.7 Gigabits Per Second Gbps Serializer/Deserializer Hot-Plug Protection High-Performance 64-Pin VQFP Thermally Enhanced Package (PowerPAD) 2.5-V Power Supply for Low Power

Contextual Info: TSC2100 www.ti.com SLAS378− NOVEMBER 2003 PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH INTEGRATED STEREO AUDIO CODEC AND HEADPHONE/SPEAKER AMPLIFIER FEATURES DESCRIPTION D Integrated Touch Screen Processor With The TSC2100 is a highly integrated touch screen

Contextual Info: SLK2511 OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER SLLS522A – JUNE 2002 – REVISED OCTOBER 2002 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Supports OC-48, OC-24, OC-12, Gigabit

Contextual Info: M29W640FT M29W640FT 64 Mbit 8Mb x8 or 4Mb x16, Page, Boot Block 3V supply Flash memory Feature summary • Supply Voltage – VCC = 2.7V to 3.6V for Program, Erase, Read – VPP =12 V for Fast Program (optional) ■ Asynchronous Random/Page Read – Page Width: 4 Words

Contextual Info: 54VCXHR162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed in both A, B outputs: – tPD = 3.4ns (Max) at VCC = 3.0 to 3.6V – tPD = 4.3ns (Max) at VCC = 2.3 to 2.7V

Contextual Info: 54VCXH162373 LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH 3-STATE WITH 3.6V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 3.3 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 4.5 ns (MAX.) at VCC = 2.3 to 2.7V

Contextual Info: 54VCXH162244 Low voltage CMOS 16-bit bus buffer 3-state inverter with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed: – tPD = 3.4ns (Max) at VCC = 3.0 to 3.6V – tPD = 3.8ns (Max) at VCC = 2.3 to 2.7V ■

Contextual Info: 54VCXHR162245 LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER 3-STATE WITH 3.6V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED IN BOTH A, B OUTPUTS: tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V

Contextual Info: 54VCXH162374 Rad hard low voltage CMOS 16-bit d-type flip-flop 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed: – tPD = 3.4 ns (Max.) at VCC = 3.0 to 3.6 V – tPD = 4.8 ns (Max.) at VCC = 2.3 to 2.7 V

transistor 2Fn

Abstract: T0040-01 p0011 P0011-01 DAC5686 DAC5686IPZP IS-136 s0032
Contextual Info: DAC5686 www.ti.com SLWS147C – APRIL 2003 – REVISED JANUARY 2005 16-BIT, 500-MSPS, 2x–16× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER FEATURES • • • • • • 500 MSPS Maximum Update Rate DAC WCDMA ACPR – 1 Carrier: 76 dB Centered at 30.72-MHz IF,

A0-A21

Abstract: JESD97 M29W640F M29W640FB M29W640FT TFBGA48
Contextual Info: M29W640FT M29W640FB 64 Mbit 8Mb x8 or 4Mb x16, Page, Boot Block 3V Supply Flash Memory Feature summary • Supply voltage – VCC = 2.7V to 3.6V for Program, Erase, Read – VPP =12 V for Fast Program (optional) ■ Asynchronous Random/Page Read – Page Width: 4 Words

54VCXH162373

Abstract: RHRXH162373K1 d 1557
Contextual Info: 54VCXH162373 Rad hard low voltage CMOS 16-bit D-type latch 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed: – tPD = 3.3 ns (Max.) at VCC = 3.0 to 3.6 V – tPD = 4.5 ns (Max.) at VCC = 2.3 to 2.7 V

54VCXH162244

Abstract: 54VCXH162245 RHRXH162244K1 RXH162244DIE2V RHFXH162244K03V
Contextual Info: 54VCXH162244 Low voltage CMOS 16-bit bus buffer 3-state non inverter with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed: – tPD = 3.4 ns at VCC = 3.0 to 3.6 V – tPD = 3.8 ns at VCC = 2.3 to 2.7 V ■ Power down protection on inputs and outputs