1987 MICRON TECHNOLOGY Search Results

IBM 286 schematic

Abstract: MX3232 MX32 MX48 MX68 matra
Contextual Info: MATRA DESIGN SEMICONDUCTOR syiraamMiD^ dMü Btküiü MX SERIES 1.55-MICRON 2-LAYER METAL SILICON GATE CMOS GATE ARRAYS Advance Information September 1987 FEATURES • Advanced 1.55u 2-layer metal CMOS technology • High perlbmance -1 .5ns delay through 2-input NAND gate

1034-01

Abstract: 74 series family LP5080A LP5140A LP7080C LP7080P LP7140P LP7220P Laserpath Corporation lsi logic arrays
Contextual Info: LSP LASERPATH LP7000P, LP7000C, LP5000A Series Gate Arrays ONE DAY GATE ARRAYS A p ril 1987 Laserpath’s LP7000P, LP7000C, and LP5000A Series are high I/O gate arrays, manufac­ tured using 2-micron, 2-layer metal HCMOS technology. They have the same electrical

Contextual Info: MX SERIES 1.55-MICRON 2-LAYER METAL SILICON GATE CMOS GATE ARRAYS MATRA DESIGN SEMICDNDUCIDR Advance Information September 1987 FEATURES • Advanced 1.55u 2-layer metal CMOS technology • High perfomance - 1 .5ns delay through 2-input NAN D gate Ta= 25 deg C, VDD = 5V, fanout= 3 + 1OOOum

MT8880AC

Abstract: MT8870CE MT8880CE MT8870C JEDEC-22BA102 cd200 mt8870 example code 87Q4 MT8870C-1 MT88L70
Contextual Info: MITEL SEMICONDUCTOR RELIABILITY MONITORING PROGRAM 1996 Table of Contents 1 INTRODUCTION TO MITEL RELIABILITY MONITORING . 1-1 2 RELIABILITY MONITOR TEST METHODOLOGY . 2-1

Contextual Info: * AT&T Preliminary Data Sheet ALA400/401 Linear Array Family Description The ALA400/401 Linear Array Family is fabricated using the complementary bipolar integrated circuit CBIC process that offers the advantages of vertical NPN and vertical PNP transistors. CBIC technology

2500ECL

Abstract: Motorola Bipolar Power Transistor Data Double Die IC 566 function generator HCA62A17 CMOS 4032 1987 Micron Technology Micron NAND bca 1st motorola ECL motorola mca
Contextual Info: BR334/D Rev 3 Motorola Semicustom gives the designer the same process-technology choices available for discrete-logic designs, and the option of Macrocell array or cell-based func­ tions for commercial and military applications. • For very high speeds — state-of-the-art ECL arrays.

HCA62A17

Contextual Info: BR334/D Rev 3 Motorola Semicustom gives the designer the same process-technology choices available for discrete-logic designs, and the option of Macrocell array or cell-based func­ tions for commercial and military applications. • For very high speeds — state-of-the-art ECL arrays.

pnp 8 transistor array

Abstract: ALA400 transistor BIPOLAR npn 8 transistor array 1000 volt pnp transistor JFET 401 ARRAY resistor DS87-61LBC kss 216 complementary JFET
Contextual Info: AT&T Preliminary Data Sheet ALA400/401 Linear Array Fam ily Description The ALA400/401 Linear Array Family is fabricated using the complementary bipolar integrated circuit CBIC process that offers the advantages of vertical NPN and vertical PNP transistors. CBIC technology

Contextual Info: Integrated Device Technology. Inc C M O S PARALLEL FIR ST-IN/FIRST-O UT FIFO 8K x 9-BIT advance in fo r ^ ion 1017205 FEATURES: DESCRIPTION: • • • • • • • • • • • • • • The IDT7205 is a dual-port memory that utilizes a special FirstIn/First-Out algorithm that loads and empties data on a first-in/firstout basis. The device uses Full and Empty flags to prevent data

nmos transistor 0.35 um

Abstract: P854 "vlsi technology" abstract for intel gelato FEM95 20VOLTS his 06 P856
Contextual Info: Intel’s 0.25 Micron, 2.0Volts Logic Process Technology A. Brand, A. Haranahalli, N. Hsieh, Y.C. Lin, G. Sery, N. Stenton, B.J. Woo California Technology and Manufacturing Group, Intel Corp. S Ahmed, M. Bohr, S. Thompson, S. Yang Portland Technology Development Group, Intel Corp.

Contextual Info: Am29027 Arithmetic Accelerator ADVANCE INFORMATION ¿Z06ZWV DISTINCTIVE CHARACTERISTICS • • • • • • High-speed floating-point accelerator for the Am29000 processor Comprehensive floating-point and integer instruction sets Single-, double-, and mixed-precision operations

AMD 29000

Abstract: Am29C27 register file
Contextual Info: Am 29027 Arithmetic Accelerator ADVANCE INFO R M ATIO N N CM O a 04 E < DISTINCTIVE CHARACTERISTICS High-speed floating-point accelerator for the Am29000 processor Comprehensive floating-point and integer instruction sets Single-, double-, and mixed-precision operations

"GE Solid state"

Contextual Info: 7 7 fi ISP9520/ISP9521 GE Solid State Multilevel Pipeline Register GENERAL DESCRIPTION FEATURES The ISP9520 and ISP9521 are multilevel pipeline regis­ ters implemented using Intersil’s 1.5 micron CMOS AVLSI technology. This high performance process allows the

austek

Contextual Info: UNITED MICROELECTRONICS U M 8 2 ÍS 2 3QE D =1325052 00 001 72 7 5 3 33-.31 - Cache Controller Features • ■ ■ ■ Controls 32-kB, 4-way r set-associative cache Available in 16-MHz, 20-MHz, and 25-MHz speeds Direct interface to the 80386 Direct interface to industry-standard 8K x 8 SRAMs:

AM29520

Abstract: ISP9520 ISP9520CPX ISP9520IJX ISP9520MMX ISP9521 ISP9521CPX ISP9521IJX GE solid state "GE Solid state"
Contextual Info: 7 7 ^ / fC ' • / •■- / 7 ISP9520/ISP9521 GE Solid State Multilevel Pipeline Register GENERAL DESCRIPTION FEATURES The ISP9520 and ISP9521 are multilevel pipeline regis­ ters implemented using Intersil’s 1.5 micron CMOS AVLSI technology. This high performance process allows the

6REV

Contextual Info: ADVANCE -. TE C? x .N-StÜT ü H E MT28F016S2 FLASH MEMORY S m artV oltag e • • • • • • • • • PIN ASSIGNMENT Top View Thirty-two 64KB erase blocks Programmable sector protect Deep Power-Down Mode: lO pA M A X Second Generation Sm artVoltage Technology (SVT-II):

IDT7205

Contextual Info: INTEGRATE» D E V I C E T ? j i| 4Ö5S771 DDDlñOT b | ~ i 4825771 INTEGRATED DEVICE Integrated DevlceTfechnblogy. Inc. 97D 01809 ADVANCE INFORMATION IDT7205 CMOS PARALLEL FIRST-IN/FIRST-OUT FIFO 8 K x 9-BIT T -*/b-35 FEATURES: DESCRIPTION: • • • •

Contextual Info: Datasheet | Switches AT-8700XL SERIES Advanced Layer 2 - 4 Access Switches AT-8724XL 24 x 10/100 Layer 2 - Layer 4 with essential Layer 3 functionality and 2 Uplink Bays AT-8748XL 48 x 10/100 Layer 2 - Layer 4 with essential Layer 3 functionality and 2 Uplink Bays

Toshiba thyristors

Abstract: bosch motorola 002X5 Flash 1987 delco radio Delco
Contextual Info: SGS-THOMSON Microelectronics  pre98whi - 1 - March 17 MISSION To offer strategic independence to our partners worldwide, as a profitable and viable broad range semiconductor supplier.  pre98whi - 2 - March 17 SGS-THOMSON : A GLOBAL SEMICONDUCTOR COMPANY

IBM ASIC Products

Abstract: nokia 2110 Dataquest
Contextual Info: SGS-THOMSON Microelectronics  pre98whi - 1 - March 17 MISSION To offer strategic independence to our partners worldwide, as a profitable and viable broad range semiconductor supplier. pre98whi - 2 - March 17  SGS-THOMSON : A GLOBAL SEMICONDUCTOR COMPANY

ATMEL AT27c512

Abstract: ATMEL 515 27C515 27c515-15 AT27C512 ATMEL AT27c513 27C515-17 27C512 128K 27C512-12 27c513
Contextual Info: Features • • • * • * • * * * Paged Configurations with Page Reset on Power-Up AT27C512 - Not Paged, 64K x 8 AT27C513 - 4 Pages, 16K X 8 AT27C515 - 2 Pages, 32K x 8 Low Power CMOS Operation 100 ¿¿A max. Standby 40 mA max. Active at 5 MHz Fast Read Access Time - 120ns

Contextual Info: PRELIMINARY !. A S H M E M O F? V FLASH MEMORY MT28F200B5 ET, MT28F400B5 ET, MT28F800B5 ET Smart 5 Extended Temperature FEATURES PIN ASSIGNMENT Top View • Extended temperature range operation: -40°C to +85°C • Boot block architecture: 16KB/4K-word boot block (protected)

ATMEL AT27c512

Abstract: 27C512 128K ATMEL 515 AT27C512 27c513 27C515-15 27C512 27C512 RESET 27C512-15 atmel 748
Contextual Info: Features * Paged Configurations with Page Reset on Power-Up AT27C512 - Not Paged, 64K x 8 AT27C513 - 4 Pages, 16K X 8 AT27C515 - 2 Pages, 32K x 8 * Low Power CMOS Operation 100 jjlA max. Standby 40 mA max. Active at 5 MHz * Fast Read Access Time - 120ns * Wide Selection of JEDEC Standard Packages incl. OTP

MT28F400B1

Contextual Info: *V K p i i c z R a f s j v O O i B!. i ' * f FLASH MEMORY m a r tV o lt a g e PIN ASSIGNMENT Top View 44-Pln SOP » Seven erase blocks: 16KB/8K-word boot block (protected) Two 8KB /4K-word param eter blocks Four main memory blocks • SmartVoltage Technology (SVT):