1DD41S2 Search Results

Til 322A

Abstract: FFD11 280/Til 322A
Contextual Info: S A R A Chipset Technical Manual Segmentation SARA Hardware Description Chapter 3. Hardware Description 3.1 Segmentation SARA Hardware Description 3.1.1 Segmentation SARA Internal Block Description Figure 3-1 shows a block diagram of the Segmentation S A R A chip.

CH341A

Abstract: digital trainer schematic diagram laf 0001 CH3401 J0123 ccs ldl HP 3D6 000A75 X77H-X70H TO SI 788 48D
Contextual Info: H i/1 I - = - ^ • QE1F Device Quad E1 Framer TXC-03104 DATA SHEET FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and

pe-67583

Abstract: hecs 50 ATM-25 Crystal Oscillator TXC PIN DIAGRAM on pad for RJ45 ALI-25 ALI-25C ALI-25T TXC-05501 TXC-07025
Contextual Info: ALI-25C and ALI-25T ATM Line Interface Devices for 25 Mbit/s Operation TXC-07025 Chip Set DATA SHEET FEATURES DESCRIPTION implements ATM-25 Mbit/s TC and PMD layer functions The ATM Line Interface 25 Mbit/s ALI-25 Ch/p Set pro­ vides the complete ATM-25 Physical Layer function

Contextual Info: t r ä ^ s S w it c h P H A S T -1 D e v ic e SONET STS-1 Overhead Terminator TXC-06101 « DATA SHEET DESCRIPTION FEATURES Provides SONET interface to any type of payload Programmable STS-1 or STS-N modes Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

Contextual Info: ADMA-T1 Device DS1 to VT1.5 Async Mapper-Desync TXC-04001 DATA SHEET FEATURES . DESCRIPTION • Add/drop two DS1s from SONET bus through asynchronous VT1.5 mapping • Handles both STS and VT pointer tracking • Monitors bus parity, SONET loss of pointer, and

Contextual Info: L4M Device Level 4 Mapper TXC-03456 DATA SHEET Preliminary . = • Maps an asynchronous 139.264 Mbit/s tributary into an AU-4/VC-4 STS-3c/SPE. • Nibble or byte 139.264 Mbit/s line interface - G.751 receive and transmit performance

feme relay FT A 001 20 10

Abstract: feme cm a 001 12 feme relay
Contextual Info: SOT-1 E Device SONET STS-1 Overhead Terminator TXC-03011 DATA SHEET Programmable STS-1 or STS-N modes Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse input for STS-N applications Transmit bit-serial STS-1 signal output from the Line

Contextual Info: COBRA Device Constant Bit Rate ATM Adaptation Layer 1 TXC-05427B DATA SHEET FEATURES = nFsrm PTinN — - = COBRA C onstant Bit Bate ATM Adaptation Layer 1 is a four-channel VLSI device that implements all of the functions needed for circuit emulation over ATM. Both

STM CL-70

Abstract: DI-149 ic laf 0001 laf 0001 equal A23 1101 01A laf 0001 power LD SOT 423 STS SOT t04 sot 23 U802A
Contextual Info: SOT-3 Device STM-1/STS-3/STS-3c Overhead Terminator TXC-03003B DATA SHEET Product Preview DESCRIPTION = The SOT-3 SDH/SONET overhead terminator is a pro­ grammable device that performs section, line and path overhead processing for STM-1/STS-3/STS-3c signals.

B15C

Abstract: d0415 TB-33 RB35
Contextual Info: HDLC Device HDLC Controller, 36-bit Terminal I/O TXC-05101 DATA SHEET Preliminary . FEATURES = = = = = ¿ ^ - 1 - -— DESCRIPTION = • HDLC ISO/OSI level 2 functions, including internal flag, abort, and zero deletion/insertion • Operates up to 51.84 Mbit/s STS-1 data rates

0.1 micro farad capacitor

Contextual Info: SYN155 Device 155-Mbit/s Synchronizer, Data Output TXC-02301B DATA SHEET FEATURES .= DESCRIPTION = • Transmits and receives at S T S -3/S TM -1 rates The S Y N 1 55 synchronizer device provides a complete S T S -3 / STM -1 fram e synchronization function in a single low-power

Contextual Info: ADMA-T1 Device 1.544 Mbit/s to VT1.5/TU-11 Async Mapper-Desync TXC-04001B DATA SHEET Preliminary = • Add/drop two 1.544 Mbit/s signals from an STS-1, an STS-3/AU-3, or an STM-1 VC-4 • independent add/drop mode between ports • Selectable AMI or B8ZS positive/negative rail or

HP 3D6

Abstract: 3D1 951 G13009 J5LJ TAIS SOT u12 sot A 1948 U802A
Contextual Info: SOT-3 Device STM-1 /STS-3/STS-3C Overhead Terminator TXC-03003 DATA SHEET Preliminary . • Full overheacTprocessing, compliant witn and CCITT standards ansi ' • Transmit and receive pointer generation with respect to external clock and frame signals

suzuki DT4

Abstract: R300F txc 7a CR20 CR21 cdr 03a selt 400 27
Contextual Info: M13E Device DS3/DS1 MUX/DEMUX, Extended Features TXC-03303 DATA SHEET FEATURES DESCRIPTION Multiplexes/demultiplexes 28 DS 1 signals to/from a DS3 signal. M13 or C-bit parity mode operation FEBE, C, or P-bit parity error insertion capability DS3 idle signal generators

CS2181

Abstract: HEC 50 E3 CS2180 TXC-05150-MB txc 7a atm header error checking dsl CT 7A2 RTD16 SU310 CS21M
Contextual Info: CDB Device Cell Delineation Block TXC-05150 DATA SHEET Preliminary FEATURES DESCRIPTION ATM cell delineation per CCITT 1.432 ATM cell rate adaptation Identifies OAM F4 cells and non-user cells Operation from 1.544 Mbps to 155.52 Mbps Programmable interfaces to DS1, DS3, E1, E3,

RCN 723

Abstract: 0340L ci5 cross reference ez 948 TXC CXO
Contextual Info: DS3F Device DS3 Framer TXC-03401 B DATA SHEET DESCRIPTION = • DS3 payload access, bit-serial or nibble-parallel • C-bit parity or M13 operating mode • C-bit interface 13 C-bits in, 14 out • Detect and generate DS3 AIS, and idle signals • Transmit reference generator for serial operation

Contextual Info: QE1F Device t r a n S w it c h Quad E1 Framer TXC-03104 DATA SHEET DESCRIPTION FEATURES • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode

Contextual Info: SOT-3 Device STM-1/STS-3/STS-3c Overhead Terminator TXC-03003B DATA SHEET Product Preview DESCRIPTION •.■■■= • Transport Section and Line Overhead byte processing • Independent Path Overhead byte processing • Transmit and receive pointer generation with

XCK M

Contextual Info: DS3F Device DS3 Framer TXC-03401 DATA SHEET FEATURES . = • DS3 payload access, bit-serial or nibble-parallel • C-bit parity or M13 operating mode • C-bit interface 13 C-bits in, 14 out • Detect and generate DS3 AIS, and idle signals • Transmit reference generator for serial operation