2 BIT DIP SWITCH Search Results

aurel d1mb

Abstract: aurel 290 5 pin 12v relay pin out diagram 145028 145026 12v relay 6 pin diagram pari 12v relay 6 pin AUREL Aurel TX
Contextual Info: mod. D1MB Application note • Nota applicativa +12V 8 tri-state dip-switch +12V T.E. MC 145026 14 11 12 TX R.F. 15 15 13 100K 1 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 2 47K 5n6F 3 12 4 5 D1MB +12V 6 7 15 RF 290 .; STD .; 3 2 7 11 1 10 14

8 bit dip switch

Abstract: JESD22-A114 JESD22-A115 JESD78 PCA9558 PCA9558DH PCA9558PW SW00636 SW00633
Contextual Info: INTEGRATED CIRCUITS PCA9558 8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM DIP switch and 2-kbit EEPROM Product data Supersedes data of 2002 May 24 Philips Semiconductors 2003 Jun 27 Philips Semiconductors Product data 8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit

opr12

Abstract: opr 12 Mosfet J49 9mfp 7291P TA8425H 8212F 7774P TA7363AP 24 dip "transistor array"
Contextual Info: 1. FUNCTION INDEX General Information E quipm ent Model Package Max. rating Functions Page TC9142P DIP 16 - 8-bit D/A conversion-type F /V P/V converter incorporated, no adjustm ent required 527 TC9192P/F DIP 18 /F L P 2 0 - Double PLL controller incorporating 8-bit D/A

Contextual Info: PCA9558 8-bit I2C-bus and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C-bus EEPROM DIP switch and 2-kbit EEPROM Rev. 5 — 25 June 2012 Product data sheet 1. General description The PCA9558 is a highly integrated, multi-function device that is composed of a 5-bit

Contextual Info: PCA9558 8-bit I2C-bus and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C-bus EEPROM DIP switch and 2-kbit EEPROM Rev. 5 — 25 June 2012 Product data sheet 1. General description The PCA9558 is a highly integrated, multi-function device that is composed of a 5-bit

JESD22-A114

Abstract: JESD22-A115 JESD78 PCA9544A PCA9558 PCA9558DH PCA9558PW TSSOP28 7136 smd ic circuit diagram of 16-1 multiplexer design logic
Contextual Info: PCA9558 8-bit I2C-bus and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C-bus EEPROM DIP switch and 2-kbit EEPROM Rev. 04 — 14 April 2009 Product data sheet 1. General description The PCA9558 is a highly integrated, multi-function device that is composed of a 5-bit

Contextual Info: FEATURES - J 1 0 - 1000 MHz MODEL NO. DA0757 1C • 2 dB LSB, 62 dB Range ■ 38 nSec Switching Speed GaAs 5 Section Attenuator ■ 12 nSec Transition Time ■ TTL Control 5 BIT ■ 24 Pin DIP Surface Mount Version ■ See DA0857 For 24 Pin DIP Version GND - -

Contextual Info: MODELS T16L08 AND T16LR8 TECHNO R/2R Ladder Networks DIP, 8 Bit APPLICATIONS 8 Bit, R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy: ± 1/2 LSB from 0°C to + 70°C. Ladder Network Resistance Tolerance: ± 2%.

Contextual Info: ANALOG DEVICES 2 ,7 V to 5.5 V, 2 |xs, 10-Bit ADC in 8-Lead microSOIC/DIP AD7810 FEATURES 10-Bit ADC with 2 juls Conversion Time Small Footprint 8-Lead microSOIC Package Specified Over a -40°C to +105°C Temperature Range Inherent Track-and-Hold Functionality

Contextual Info: FEATURES • 1 0 - 1000 MHz Iff Ì ■ 2 dB LSB, 62 dB Range I? * * .-t. ■ 38 nSec Switching Speed - Ï ^ , • ■ 12 nSec Transition Time 5 BIT ■ TTL Control ■ 24 Pin DIP Surface Mount Version ■ See DA0857 For 24 Pin DIP Version RF IN/OUT 24 ♦5V

ladder network

Contextual Info: MODELS T16L08 AND T16LR8 R/2R Ladder Networks DIP, 8 Bit TECHNO T APPLICATIONS 8 Bit, R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy: ± 1/2 LSB from 0°C to + 70°C. Ladder Network Resistance Tolerance: ± 2%.

DA0757

Abstract: DA0857
Contextual Info: FEA TU R ES & • 1 0 -1 0 0 0 MHz ■ 2 dB LSB, 62 dB Range ■ 38 nSec Switching Speed MODEL NO. DA0757 GaAs 5 Section Attenuator ■ 12 nSec Transition Time ■ TTL Control 5 BIT ■ 24 Pin DIP Surface Mount Version ■ See DA0857 For 24 Pin DIP Version

Contextual Info: A COMPANY MODEL T14L10 R/2R Ladder Networks OF TECHNO DIP, 10 Bit APPLICATIONS 10 Bit, R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy: ± 1 LSB from 0°C to + 70°C. Ladder Network Resistance Tolerance: ± 2%.

MAX1241AEPA

Abstract: MAX1241AESA MAX1241BCPA MAX1241BCSA MAX1241BEPA MAX1241BESA MAX1241 MAX1241ACPA MAX1241ACSA
Contextual Info: 19-1155; Rev 0; 11/96 KIT ATION EVALU BLE A IL A V A +2.7V, Low-Power, 12-Bit Serial ADC _Features ♦ ♦ ♦ ♦ TEMP. RANGE PINPACKAGE INL LSB MAX1241ACPA 0°C to +70°C 8 Plastic DIP ±1/2 MAX1241BCPA 0°C to +70°C 8 Plastic DIP

DAC370-18

Abstract: DAC370C-18 DAC370B-18 cmos microcircuit catalog DAC370C18
Contextual Info: Hybrid Systems W W CORPORATION DAC370-18 18-Bit Storage Register, MDAC FEATURES • True 16-Bit 0.0008% Linearity ■ Two Chip Construction ■ Input Registers ■ Low Power ■ Hermetic 28-pin DIP, ■ 2 and 4-quadrant Multiplication ■ Single-Supply Operation

MC145146

Abstract: BR504 MC145146-2 MC12032 MC12011 MC145146DW2 mc145146p MC10131 T 2109 AN535
Contextual Info: MOTOROLA S E M IC O N D U C T O R TECHN ICAL DATA MC145146-2 Advance Information 4-Bit Data Bus Input PLL Frequency Synthesizer P SUFFIX PLASTIC DIP CASE 738 Interfaces with Dual-Modulus Prescalers The MC145146-2 is programmed by a 4-bit input, with strobe and address

DA0757

Abstract: DA0857
Contextual Info: F E AT U R E S MODEL NO. DA0757 10 - 1000 MHz 2 dB LSB, 62 dB Range 32 nSec Switching Speed 18 nSec Transition Time TTL Control 24 Pin DIP Surface Mount Version See DA0857 for 24 Pin DIP Version 5 BIT GaAs 5 Section Attenuator RF RF IN/OUT GND GND GND GND GND GND GND GND GND GND IN/OUT

Contextual Info: MODEL T14L10 TECHNO R/2R Ladder Networks DIP, 10 Bit ▼ APPLICATIONS 4 li% i 10 Bit, R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy: ± 1 LSB from 0°C to + 70°C. Ladder Network Resistance Tolerance: ± 2%.

Contextual Info: LH534P00 FEATURES • 52 4 ,2 8 8 x 8 bit organization CMOS 4M 512K x 8 / 256K x 16 Mask-Programmable ROM PIN CONNECTIONS 40-PIN DIP TO P VIEW (Byte mode) 26 2 ,1 4 4 x 16 bit organization (Word mode) • • Access time: 120 ns (M AX.) Pow er consumption:

A-1435

Abstract: 538P00-1 8 bit dip switch 538P00-6 iB33AA
Contextual Info: LH538P00 • PIN CONNECTIONS 1,048,576 x 8 bit organization Byte mode 5 2 4 ,2 8 8 x 16 bit organization (Word mode) • • Access time: 120 ns (M AX.) Pow er consumption: Operating: 3 3 0 mW (M AX.) Standby: 550 (M AX.) 42-PIN DIP f a ,8C a Static operation

Contextual Info: ANALOG DEVICES + 2 .7 V to +5.5 V, Serial Input, Dual Voltage Output 8-Bit DAC AD7303 FEATURES Two 8-Bit DACs in One Package 8-Pin DIP/SOIC and microSOIC Packages +2.7 V to +5.5 V Operation Internal & External Reference Capability Individual DAC Power-Down Function

5252 F 1102

Abstract: 42-PIN 44-PIN
Contextual Info: PRELIMINARY LH53B16P00 FEATURES • 2,097,152 words x 8 bit organization Byte mode 1,048,576 words × 16 bit organization (Word mode) CMOS 16M (2M × 8/1M × 16) MaskProgrammable ROM With Page Mode PIN CONNECTIONS 42-PIN DIP TOP VIEW A18 1 42 A19 A17 2

48-PIN

Abstract: d1220
Contextual Info: LH534600B FEATURES • 524,288 words x 8 bit organization Byte mode 262,144 words × 16 bit organization (Word mode) CMOS 4M (512K × 8/256K × 16) Mask-Programmable ROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW A17 1 40 A8 A7 2 39 A9 • BYTE input pin selects bit configuration

Contextual Info: A COMPANY MODELS T 16L 08 and T16LR 8 R/2R Ladder N etw orks OF W TECHNO DIP, 8 Bit APPLICATIONS 8 Bit, R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy: ± 1/2 LSB from 0°C to + 70°C.