200500MHZ Search Results

Contextual Info: PCS5I9658 November 2006 rev 0.3 3.3V 1:10 LVCMOS PLL Clock Generator Features and the reference clock frequency determines the VCO • 1:10 PLL based low-voltage clock generator frequency. Both must be selected to match the VCO • Supports zero-delay operation

XRK69774

Abstract: XRK69774CR XRK69774IR
Contextual Info: XRK69774 PRELIMINARY 1:14 LVCMOS PLL CLOCK GENERATOR APRIL 2006 REV. P1.0.1 GENERAL DESCRIPTION to125MHz and an input frequency range of 4.16MHz to 62.5MHz. The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69774 can select between one

Contextual Info: CY29352 2.5 V or 3.3 V, 200 MHz, 11 Output Zero Delay Buffer 2.5 V or 3.3 V, 200 MHz, 11 Output Zero Delay Buffer Description Features • Output frequency range: 16.67 MHz to 200 MHz ■ Input frequency range: 16.67 MHz to 200 MHz ■ 2.5 V or 3.3 V operation

CY29352

Abstract: MPC9352 MPC952
Contextual Info: CY29352 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer Features Description • Output frequency range: 16.67 MHz to 200 MHz ■ Input frequency range: 16.67 MHz to 200 MHz The CY29352 is a low voltage high performance 200 MHz PLL based zero delay buffer designed for high speed clock distribution applications.

CY29352

Abstract: CY29352AI CY29352AIT MPC9352 MPC952
Contextual Info: CY29352 2.5V or 3.3V, 200-MHz, 11-Output Zero Delay Buffer Features • • • • • • • • • • • • • • Description Output frequency range: 16.67 MHz to 200 MHz Input frequency range: 16.67 MHz to 200 MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs

Contextual Info: CY29352 2.5V or 3.3V, 200-MHz, 11-Output Zero Delay Buffer Features • • • • • • • • • • • • • • Description Output frequency range: 16.67 MHz to 200 MHz Input frequency range: 16.67 MHz to 200 MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs

XP170E

Abstract: XP220E XP272E XP378E XP444E XP568E XP708E XP830E 124mA Cell-based ASICs - Reference Library
Contextual Info: XPressArray 0.18µ Hybrid Gate Array 1.0 Key Features • Supports LVTTL, LVCMOS, PCI, PCI-X, HSTL, SSTL, GTL/+, LVPECL, LVDS, BLVDS • 1.5V, 1.8V, 2.5V and 3.3V capable I/O • True 3.3V and 5V tolerance with no external resistor necessary • Up to 830 user I/Os

CY29653

Abstract: CY29653AC CY29653ACT MPC953 MPC9653
Contextual Info: CY29653 3.3V, 125-MHz, 8-Output Zero Delay Buffer Features • • • • • • • • • • • • • • Description Output frequency range: 25 MHz to 125 MHz Input frequency range ÷4 : 35 MHz to 125 MHz Input frequency range (÷8): 25 MHz to 62.5 MHz

ra1613

Abstract: FB360 HSTL18 XC2V3000-BG728 XC3S1000-FT256 XC3S200-ft256 X2P376 X2P528 X2P680 BGA 728 35x35 1.27
Contextual Info: XPressArray-II 0.15mm Structured ASIC Data Sheet 1.0 Key Features • Next-generation 0.15mm hybrid structured ASIC • Initializable distributed memory at speeds up to 210MHz • Platform for high-performance 1.5V/1.2V ASICs and FPGAto-ASIC conversions • Configurable signal, core and I/O power supply pin locations

Contextual Info: CY29653 3.3V 125-MHz 8-Output Zero Delay Buffer Features Description • Output frequency range: 25 MHz to 125 MHz The CY29653 is a low-voltage high-performance 125-MHz PLL-based zero delay buffer designed for high-speed clock distribution applications. The CY29653 features an LVPECL

R1019

Abstract: 3 phase AC servo PANASONIC drive schematic
Contextual Info: Application Note 1837 Author: Michael Steffes Ultra High Performance Broadband 12 to 16-Bit Data Acquisition Platform ISLA214P50-55210EV1Z High Speed ADC/AMP Evaluation Board 1. ISLA214P50 High Speed, High Performance ADC 14-bit, 500MSPS 2. ISL55210 High Performance, Low Power, Fully Differential

ASM5I9775A

Abstract: ASM5I9775A-52-ER ASM5I9775A-52-ET ASM5I9775AG-52-ER ASM5I9775AG-52-ET
Contextual Info: ASM5I9775A June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 14 Output Zero Delay Buffer General Features 14 outputs partitioned in 3 banks of 5, 5, and 4 outputs. ƒ Output frequency range: 8.3MHz to 200MHz ƒ Input frequency range: 4.2MHz to 125MHz ƒ 2.5V or 3.3V operation

CY29653

Abstract: CY29653AC CY29653ACT CY29653AI CY29653AIT MPC953 MPC9653
Contextual Info: CY29653 3.3V 125-MHz 8-Output Zero Delay Buffer Features Description • Output frequency range: 25 MHz to 125 MHz The CY29653 is a low-voltage high-performance 125-MHz PLL-based zero delay buffer designed for high-speed clock distribution applications. The CY29653 features an LVPECL

CY29653

Abstract: CY29653AC CY29653ACT CY29653AI CY29653AIT MPC953 MPC9653
Contextual Info: CY29653 3.3V 125-MHz 8-Output Zero Delay Buffer Features Description • Output frequency range: 25 MHz to 125 MHz The CY29653 is a low-voltage high-performance 125-MHz PLL-based zero delay buffer designed for high-speed clock distribution applications. The CY29653 features an LVPECL

Contextual Info: PCS5I9352 September 2006 rev 0.3 2.5V or 3.3V, 200MHz, 11 Output Zero Delay Buffer Features The PCS5I9352 features an LVCMOS reference clock • Output frequency range: 16.67MHz to 200MHz input and provides 11 outputs partitioned in 3 banks of 5, 4, • Input frequency range: 16.67MHz to 200MHz

Contextual Info: PCS5I9774 September 2006 rev 0.4 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer Features The PCS5I9774 features two reference clock inputs and • Output frequency range: 8.3MHz to 125MHz provides 14 outputs partitioned in 3 banks of 5, 5, and 4 • Input frequency range: 4.2MHz to 62.5MHz

XC3S1000-FT256

Abstract: XC3S1000-FG456 XC2VP30-FF896 XILINX/SPARTAN-3 XC3S200 XC2V3000-BG728 XC2VP4-FG456 XC3S200FT256 XC2V1000-FG456 XC2V3000-FG676 XC2VP20 fg676
Contextual Info: XPressArray-II 0.15mm Structured ASIC Data Sheet 1.0 Key Features • Next-generation 0.15µm structured ASIC • Platform for high-performance 1.5V/1.2V ASICs and FPGA-to-ASIC conversions • NRE and production cost savings • Significant time-to-market advantages

CY29352

Abstract: CY29352AXI CY29352AXIT MPC9352 MPC952
Contextual Info: CY29352 2.5V or 3.3V, 200-MHz, 11-Output Zero Delay Buffer Features • • • • • • • • • • • • • • Description Output frequency range: 16.67 MHz to 200 MHz Input frequency range: 16.67 MHz to 200 MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs

Contextual Info: CY29352 2.5 V or 3.3 V, 200 MHz, 11 Output Zero Delay Buffer 2.5 V or 3.3 V, 200 MHz, 11 Output Zero Delay Buffer Features Description • Output frequency range: 16.67 MHz to 200 MHz ■ Input frequency range: 16.67 MHz to 200 MHz ■ 2.5 V or 3.3 V operation

PQFP240

Abstract: XP560E-FBGA484 XCV200E-PQ240 xcv2000e-bg560 XCV100E-FG256 XCV100Efg256 PQFP208 XILINX XCV600E-BG432 XP704E-PBGA676 XCV400E-PQ240
Contextual Info: XPressArray 0.18µ Hybrid Gate Array 1.0 Key Features • Supports LVTTL, LVCMOS, PCI, PCI-X, AGP-2X, HSTL, SSTL, GTL/+, LVPECL, LVDS, BLVDS • 1.8V, 2.5V and 3.3V capable I/O • True 3.3V and 5V tolerance with no external resistor necessary • Up to 832 user I/Os

Contextual Info: MOTOROLA Freescale Semiconductor, Inc. Order this document by MPC953/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC953 Freescale Semiconductor, Inc. The MPC953 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of

resistor 1r-1W

Abstract: XP444HE XP568HE XP708HE XP830HE XP170HE XP220HE XP272HE XP378HE LVPECL33
Contextual Info: XPressArray High Density 0.18µm Structured ASIC Datasheet 1.0 Key Features • Supports LVTTL, LVCMOS, PCI, PCI-X, HSTL, SSTL, GTL/+, LVPECL, LVDS, BLVDS • 1.5V, 1.8V, 2.5V and 3.3V capable I/O • True 3.3V tolerance with no external resistor necessary

ASM5I9774AG-52-ET

Abstract: CY29774AI MPC9774 ASM5I9774A ASM5I9774A-52-ER ASM5I9774A-52-ET ASM5I9774AG-52-ER
Contextual Info: ASM5I9774A June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer Features The ASM5I9774A features two reference clock inputs and ƒ Output frequency range: 8.3MHz to 125MHz provides 14 outputs partitioned in 3 banks of 5, 5, and 4 ƒ Input frequency range: 4.2MHz to 62.5MHz

ASM5I9350G-32-ET

Abstract: ASM5I9350G-32-LT CY29350 MPC9350 ASM5I9350 ASM5I9350-32-ET ASM5I9350-32-LT
Contextual Info: ASM5I9350 July 2005 rev 0.2 3.3V 1:10 LVCMOS PLL Clock Generator Features The ASM5I9350 features Xtal and LVCMOS reference clock inputs and provides nine outputs partitioned in four ƒ Output frequency range: 25 MHz to 200 MHz ƒ Input frequency range: 6.25 MHz to 31.25 MHz