2009J3C Search Results

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Text: TMC2009 T R Y C M O S Multiplier-Accumulator F e a tu r e s 1 2 x 1 2 • Low Power Consum ption CMOS Process B it, 1 3 5 n s The T M C 2 0 0 9 is a high-speed 1 2 x 1 2 bit parallel m ultiplier-accum ulator w h ich operates at a 135ns cycle tim e 7.4M Hz m ultiply-accum ulate rate . The input data