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single chip digital multimeter

Abstract: Piezo Switchs AD736 NJU9214 NJU9214FG1 QFP100-G1 24 pin relay driver PTC 500 Buzzer* 1000hz
Contextual Info: NJU9214 PRELIMINARY 43/4 DIGIT SINGLE CHIP DIGITAL MULTIMETER LSI • GENERAL DESCRIPTION The NJU9214 is a 43/4 digits single chip digital multimeter LSI with 42 segments bargraph display. The NJU9214 realizes high precision of ±40,000 counts measurement by the NJRC original dual-slope A to D

CY7B933

Abstract: CY7C924DX CYP15G0401DX CYP15G0401DXA
Contextual Info: PRELIMINARY CYP15G0401DXA Quad HOTLink II Transceiver Features — fiber-optic modules • 2nd generation HOTLink technology • Fibre Channel and Gigabit Ethernet compliant 8B/10Bcoded or 10-bit unencoded • 8-bit encoded data transport • 10-bit unencoded data transport

RBS 6402

Abstract: smd code 1Bs smd fuse marking code TN solar cell cnc TRANSISTOR SMD MARKING CODE kn smd transistor 5Bs smd transistor marking DK RH smd transistor marking cf rh RBS 2202 telecom rbs 6102
Contextual Info: Contents 2011 RoHS Compliant CERAMIC METALIZED SUBSTRATE Ceramic Metalized Substrate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F1-F2 CIRCUIT PROTECTION PRODUCTS Page Over-Current Protection CF/CFS

Contextual Info: EPSON PF771-03 SPC7221 F oa SCSI-2 & CD-ROM Decoder • Supporting SCSI-2 specification ANSI X3.131 • 20-times speed CD-ROM decoding operation • OUTLINE SPC7221 F o a is LSIs of CD-ROM decoder and host interface. It supports decoding of 20-times speed and interface

CY7B933

Abstract: CYP15G0401DXB
Contextual Info: PRELIMINARY CYP15G0401DXB Quad HOTLink II Transceiver Features • Dual differential PECL-compatible serial outputs per channel — Source matched for 50Ω transmission lines • 2nd generation HOTLink technology • Fibre Channel and Gigabit Ethernet compliant

data sheet IC 7408

Abstract: IC 7408 7408 ic truth table AD5291 AD5292 7408 pin configuration IC AND GATE 7408 IC AND GATE 7408 specification sheet pin DIAGRAM OF IC 7408 7408 AND GATE
Contextual Info: 256-/1024-Position, Digital Potentiometers with Maximum ±1% R-Tolerance Error and 20-TP Memory AD5291/AD5292 FEATURES APPLICATIONS Mechanical potentiometer replacement Instrumentation: gain and offset adjustment Programmable voltage-to-current conversion

CYP15G0403DXB

Abstract: CYV15G0403DXB CYPV15G0403DXB
Contextual Info: CYP15G0403DXB CYV15G0403DXB PRELIMINARY Independent Clock Quad HOTLink II Transceiver Features • Quad channel transceiver for 195- to 1500-MBaud serial signaling rate — Aggregate throughput of up to 12 Gbits/second • Second-generation HOTLink technology

CYV15G0104TRB

Abstract: CYV15G0104TRB-BGC smpte 292M hd-SDI deserializer
Contextual Info: CYV15G0104TRB PRELIMINARY Independent Clock HOTLink II Serializer and Reclocking Deserializer Features including SMPTE 292M and SMPTE 259M video applications. It supports signaling rates in the range of 195 to 1500 Mbps per serial link. The transmit and receive channels are

Contextual Info: CYV15G0104TRB Independent Clock HOTLink II Serializer and Reclocking Deserializer Features Functional Description • Second-generation HOTLink technology ■ Compliant to SMPTE 292M and SMPTE 259M video standards ■ Single channel video serializer plus single channel video

Contextual Info: CYV15G0104TRB Independent Clock HOTLink II Serializer and Reclocking Deserializer Features transfer of data over a variety of high-speed serial links including SMPTE 292M and SMPTE 259M video applications. It supports signaling rates in the range of 195 to 1500 Mbps

b20 p03

Contextual Info: CYV15G0204TRB PRELIMINARY Independent Clock HOTLink II Dual Serializer and Dual Reclocking Deserializer Features • Second-generation HOTLink technology • Compliant to SMPTE 292M and SMPTE 259M video standards • Dual-channel video serializer plus dual channel video

Contextual Info: CYP15G0401DXB CYV15G0401DXB Quad HOTLink II Transceiver Features • Quad channel transceiver for 195 to 1500 MBaud serial signaling rate — Aggregate throughput of 12 GBits/second • Second-generation HOTLink technology • Compliant to multiple standards

CYV15G0403TB

Abstract: CYV15G0404RB SMPTE292M Coprocessor
Contextual Info: CYV15G0403TB PRELIMINARY Independent Clock Quad HOTLink II Serializer Features • Quad channel video serializer — 195- to 1500-Mbps serial data signaling rate — Simultaneous operation at different signaling rates • Second-generation HOTLink technology

CYV15G0104TRB

Abstract: CYV15G0104TRB-BGXC
Contextual Info: CYV15G0104TRB Independent Clock HOTLink II Serializer and Reclocking Deserializer Features Functional Description • Second-generation HOTLink technology ■ Compliant to SMPTE 292M and SMPTE 259M video standards ■ Single channel video serializer plus single channel video

CYP15G0401DXB

Abstract: CYV15G0401DXB Driving Copper Cables with HOTLink
Contextual Info: CYP15G0401DXB CYV15G0401DXB Quad HOTLink II Transceiver Features • Second-generation HOTLink technology ❐ Compliant to multiple standards — ESCON, DVB-ASI, fibre channel and gigabit ethernet IEEE802.3z ■ Internal phase-locked loops (PLLs) with no external PLL

CYV15G0203TB

Abstract: CYV15G0203TB-BGC CYV15G0204RB
Contextual Info: CYV15G0203TB Independent Clock Dual HOTLink II Serializer Features Functional Description • Second-generation HOTLink technology • Compliant to SMPTE 292M and SMPTE 259M video standards • Dual-channel video serializer — 195- to 1500-Mbps serial data signaling rate

8H13

Abstract: 8H11
Contextual Info: AppNoteRegMem Page 1 Tuesday, August 5, 1997 2:32 PM RTL Register-Based Memory Implementations This Application Note describes how to build and test a high speed register SRAM or FIFO given RTL code. With a small memory requirement, you can synthesize to a non-SRAMbased Actel family, such as the XL or ACT 3 families. This note

Contextual Info: 19-1788; Rev 0; 10/00 KIT ATION EVALU LE B A IL A AV Triple Charge-Pump TFT LCD DC-DC Converter Features ♦ Adjustable Outputs The dual low-power charge pumps independently regulate one positive output VPOS and one negative output (VNEG). These additional outputs use external diode

CYP15G0403DXB

Abstract: CYV15G0403DXB
Contextual Info: CYP15G0403DXB CYV15G0403DXB PRELIMINARY Independent Clock Quad HOTLink II Transceiver Features • Quad channel transceiver for 195- to 1500-MBaud serial signaling rate — Aggregate throughput of up to 12 Gbits/second • Second-generation HOTLink technology

Contextual Info: Rev: 0.0 ISSUE NO : DATE OF ISSUE : Feb. 27 2012 SPECIFICATION MODEL : SPFCW04301BL High Power Flash LED CUSTOMER : CUSTOMER : CHECKED CHECKED APPROVED SAMSUNG LED DRAWN CHECKED APPROVED SAMSUNG LED CO,.LTD. Nongseo-dong, Giheung-gu, Yongin-si, Gyeonggi-do, 446-711 KOREA

AC131

Abstract: 8H13 L111 8h02 8H10
Contextual Info: AppNoteRegMem Page 1 Tuesday, August 5, 1997 2:32 PM Application Note AC131 RTL Register-Based Memory Implementations This Application Note describes how to build and test a high speed register SRAM or FIFO given RTL code. With a small memory requirement, you can synthesize to a non-SRAMbased Actel family, such as the XL or ACT 3 families. This note

CYV15G0204TRB

Abstract: CYV15G0204TRB-BGC CYV15G0204TRB-BGXC
Contextual Info: CYV15G0204TRB Independent Clock HOTLink II Dual Serializer and Dual Reclocking Deserializer • Second-generation HOTLink technology • Compliant to SMPTE 292M and SMPTE 259M video standards • Dual-channel video serializer plus dual channel video reclocking deserializer

T04 943

Abstract: CYV15G0403TB CYV15G0404RB SMPTE292M
Contextual Info: CYV15G0403TB Independent Clock Quad HOTLink II Serializer Features • Second-generation HOTLink technology • Compliant to SMPTE 292M and SMPTE 259M video standards • Quad channel video serializer — 195- to 1500-Mbps serial data signaling rate — Simultaneous operation at different signaling rates

smd fuse marking

Contextual Info: Document No TRF12 series REV : A2 Issued date 2010/07/09 Page 1/9 Lead Free SMD Resettable Fuse 1. Scope This specification applies for the Lead-Free SMD Resettable fuse series . 2. Construction Style 1 Style 2 3. Type Designation TRF 12 035 V06 E F 2 SMD