24 C 1024 W Search Results

Contextual Info: LF48410 1024 x 24-bit Video Histogrammer D EVICES I N C O R P O R A T E D DESCRIPTION FEATURES □ 40 MHz Data In p u t and C om pu­ tation Rate □ 1024 x 24-bit Memory A rray □ Histograms of Images up to 4K x 4K w ith 10-bit Pixel Resolution □ Memory Array Flash Clear

Contextual Info: LF48410 1024 x 24-bit Video Histogrammer DESCRIPTION FEATURES □ 40 M H z Data Input and C om pu­ tation Rate □ 1024 x 24-bit M em ory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ M em ory Array Flash Clear □ User-Programmable Modes:

scientific imaging technologies

Abstract: SI-003A SIA003A AD590 mpp schematic scientific imaging technologies inc ccd incoming inspection SI003
Contextual Info: S C I E N T I F I C I M A G I N G T E C H N O L O G I E S , I N C . 1024 x 1024 pixel format 24µm square n Front-illuminated or thinned, back-illuminated versions n Packaged with a two stage Thermoelectric cooler for improved performance without a dewar

scientific imaging technologies

Abstract: SI-003A mpp schematic infrared diode p1d scientific imaging technologies inc ccd incoming inspection SI-424A
Contextual Info: S C I E N T I F I C I M A G I N G T E C H N O L O G I E S , I N C . 1024 x 1024 pixel format 24µm square n Front-illuminated or thinned, back-illuminated versions n Unique thinning and Quantum Efficiency enhancement processes n Excellent QE from IR to UV

Contextual Info: This document was generated on 04/24/2012 PLEASE CHECK WWW.MOLEX.COM FOR LATEST PART INFORMATION Part Number: Status: Overview: Description: 15-38-1024 Active C-Grid Products 2.54mm Pitch C-Grid® Shunt Terminal Housings, All Over Tin Sn , 2 Circuits, with

80011A

Abstract: Mitsubishi 80011a
Contextual Info: I ^24=1025 QG2321D 024 • M IT I MITSUBISHI L SIs M 6M 80011AP,L,FP 1024-BIT 64-W 0RD BY 16-BIT ELECTRICALLY ERASABLE AND PROGRAMMABLE ROM D E S C R IP T IO N The M 6 M 8 0 0 1 1 A P, L, FP are 1024-bit (64-word x 16bit) electrically erasable CMOS EEPRO M s, and all have a

Contextual Info: DALLAS SEMICONDUCTOR DS2010 1024x9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W C 1* 28 □ V C C 27 □ D4 • Flexible 1024 x 9 organization D SC 2 D3C 3 • Low-power HCMOS technology D 2Ü 4 24 • Asychronous and simultaneous read/write

7L084

Abstract: 2708 eprom 27L08 eprom 2708 TMS2708 texas 2708 rom 1024x8 7L08
Contextual Info: TM S2708, TMS27L08, SM J2708. SM J27L08 1024-W0RD BY 8-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORIES MOS LSI D ECEM BER 1979 All Inputs and Outputs Fully T T L Compatible A 7C S tatic Operation {No C lo cks, IMo Refresh Max A ccess/M in C y cle Time 24 3 v c c

27L08-45

Abstract: 2708 eprom 27L08 2708-45 74LS TTL 245 TMS 2708 JL a1023 ansi y32.14 diagram 2708 memory TMS2708
Contextual Info: TMS 2708-35 JL. TMS 2708-45 JL, TMS 27L08-45 JL 1024-WORD BY 8-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORIES MOS LSI D E C E M B E R 1 9 7 9 - R E V I S E D M A Y 1982 1024 X 8 Organization A ll Inputs and O utputs F ully T T L Compatible 24-PIN CER P AK D U A L -IN -L IN E PACKAG E

21H10

Abstract: TMS4023 a815c LD04
Contextual Info: MOS LSI TMS 4023 NC 1024-BIT RANDOM-ACCESS MEMORY features Low power dissipation Access time — 650 nsec maximum Cycle time — 900 ns (maximum Refresh Period — 2 ms for 0°C —70° C Fully decoded Wired-OR capability Inputs fully protected 24-lead plastic package

vcd IC

Abstract: 93425
Contextual Info: MOTOROLA SEM ICO NDUCTO R TECHNICAL DATA M ilita ry 9 3 4 2 5 T T L 10 24 x 1-Bit R a n d o m A c c e s s M e m o ry The 93425 is a 1024-bit R ead/W rite RAM , orga n ized 1024 w o rd s b y 1 bit. The 93425 is desig n ed fo r h ig h p e rfo rm a n ce m a in m e m o ry and c o n tro l s to r­

HPA 1112

Abstract: AVANTEK transistor
Contextual Info: Whol mL'nM HEW LETT P a c k a rd Avantek Products Thin-Film Cascadable Amplifier 10 to 1000 MHz Technical Data UTO/UTC 1024 Series Features • Frequency Range: 10 to 1000 MHz • High Power Output: +24 dBm Typ • Medium Gain: 13.0 dB (Typ) • Temperature Compensated

Contextual Info: LF48410 DEV IC ES IN C O R PO R A TE D FEATURES □ 40 M H z Data Input and C om pu­ tation Rate □ 1024 x 24-bit Memory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ Memory Array Flash Clear □ User-Programmable Modes: Histogram, Histogram Accumulate,

RRUS 32

Abstract: CL-GD542X CL-GD543X CL-GD5452 CL-GD5453 bitblt GD54 vl-bus RRUS
Contextual Info: • CIRRUS LOGIC ElBbfc^ DGOMTbM E4T H C I R CL-GD5452/GD5453 Preliminary Product Bulletin FEATURES ■ Two-chip multiplexer-less, VRAM-based graphics accelerator ■ Resolutions supported: High-Resolution True Color Graphics Accelerator — 1280 x 1024 x 24 bits per pixel non-interlaced

Contextual Info: LF48410 □ FV IC E S IN C O R P Q R A T F D FEATURES □ 40 MHz Data Input and Compu­ tation Rate □ 1024 x 24-bit Memory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ Memory Array Flash Clear □ User-Programmable Modes:

HSP48410JC-33

Abstract: DIN11 HSP48410 HSP48410GC-33 HSP48410GC-40 HSP48410JC-40 Look Up Table
Contextual Info: HSP48410 S E M I C O N D U C T O R Histogrammer/Accumulating Buffer January 1994 Features Description • 10-Bit Pixel Data The Harris HSP48410 is an 84 lead Histogrammer IC intended for use in image and signal analysis. The on-board memory is configured as 1024 x 24 array. This translates to a

RE27C

Contextual Info: V E R Y H IG H S P E E D C M O S C L O C K E D F IF O MEMORY C O M PO N EN TS P R E L IM IN A R Y FEATURES □ 1024 x 5 O rganization ^ 1 c □ 24 V ce 2 C □ 23 CKW 3 C □ W E, D, 4 □ □ 21 U 20 DR □ Very high perform ance °3 22 Cycle Frequency Access

CHN13

Contextual Info: m HARRIS U m HSP48410 S E M I C O N D U C T O R Histogrammer/Accumulating Buffer January 1994 Features Description • 10-Blt Pixel Data The Harris HSP48410 is an 84 lead Histogrammer 1C intended for use in image and signal analysis. The on-board memory is configured as 1024 x 24 array. This translates to a

Fairchild 93415

Abstract: TTL 7475 762T LS 7475 NEC AMERICA
Contextual Info: m m n u SEC BIPOLAR DIGITAL INTEGRATED CIRCUIT ¿¿PB2205D FLECTRON DEVICE 1 0 2 4 -B IT B IP O L A R TTL RAM The N E C ¿¿PB 2205D integrated circuits are high-speed Open-Collector T T L interface, 10 24 -b it Random A ccess Memories. FEATURES: 1. 1024 W O R D S

IN230

Contextual Info: I FdRdm L v IJ b V IO S ü f v IN u U h H C K A I h i □ 40 MHz Data Input and Compu­ tation Rate □ 1024 x 24-bit Memory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ Memory Array Flash Clear □ User-Programmable Modes:

Contextual Info: LF48410 D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ 40 M H z D ata In p u t and C om pu­ tation Rate □ 1024 x 24-bit M em ory A rra y □ Histogram s of Im ages up to 4K x 4K w ith 10-bit Pixel Resolution □ M em ory A rra y Flash C lear

HM1-6514 REFERENCE

Contextual Info: Ì l i H A R R IS H S E M I C O N D U C T O R M - 6 5 1 4 10 24 x 4 CMOS RAM February 1992 Features Description • Low Power Standby. 125|iW Max. The HM-6514 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes

CHN12

Abstract: CHN11 DI012 DI020 DI017 IC/CHN12
Contextual Info: f ü H A R R HSP48410 I S S E M I C O N D U C T O R Histogrammer/Accumulating Buffer January 1994 Features Description • 10-Blt Pixel Data The Harris HSP48410 is an 84 lead Histogrammer IC intended for use in image and signal analysis. The on-board memory is configured as 1024 x 24 array. This translates to a

4505

Contextual Info: V E R Y H IG H S P E E D C M O S C L O C K E D F IF O P R E L IM IN A R Y MEMORY COM PONENTS FEATURES 1024 x 5 O rga n iza tio n Very high p e rfo rm a n ce Part No. Cycle Time D4 1 c °3 2 c • □ 24 Vcc □ 23 CKW Cycle Frequency Access Time 3 c □ 22