24MBIT Search Results

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Max Data Rate 54MHz in full-time Random Access Mode May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Data Rate May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit • 2,073,600 x 12-bit Operating Modes:

32-KW Load Bank

Abstract: tes 1310 LFBGA 555H SST34HF324G
Contextual Info: 32 Mbit Dual-Bank Flash + 4 Mbit SRAM ComboMemory SST34HF324G SST34HF324G32Mb Dual-Bank Flash + 4 Mb SRAM MCP ComboMemory Data Sheet FEATURES: • Flash Organization: 2M x16 – 32 Mbit: 24Mbit + 8Mbit • Concurrent Operation – Read from or Write to SRAM while

555H

Abstract: SST34HF324G
Contextual Info: 32 Mbit Dual-Bank Flash + 4 Mbit SRAM ComboMemory SST34HF324G SST34HF324G32Mb Dual-Bank Flash + 4 Mb SRAM MCP ComboMemory Data Sheet FEATURES: • Flash Organization: 2M x16 – 32 Mbit: 24Mbit + 8Mbit • Concurrent Operation – Read from or Write to SRAM while

LF3324

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Data Rate May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit • 2,073,600 x 12-bit Operating Modes:

Contextual Info: May 1997 ^ÉL M icro Linear ML6025 24 Mbps Read Channel Filter/Equalizer G EN ERAL D ESCRIPTIO N FEATURES The ML6025 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 24Mbits/s, with

LF3324

Abstract: LF3324 f BUFFER FIFO
Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Max Data Rate 54MHz in full-time Random Access Mode May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit

LF3324 b

Abstract: LF3324
Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit • 2,073,600 x 12-bit Operating Modes: • Random Access with Burst Control

ML6005

Contextual Info: June 1992 PRELIMINARY M icro Linear ML6005 24 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML6005 is a monolithic analog filter/equalizer intended for hard diskdrive read channel applications, capable of handling disk data rates upto 24Mbits/s, with

LF3324

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 54 Mhz Max Data Rate May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit • 2,073,600 x 12-bit Operating Modes:

555H

Abstract: SST34HF324G irt 1310
Contextual Info: 32 Mbit Dual-Bank Flash + 4 Mbit SRAM ComboMemory SST34HF324G SST34HF324G32Mb Dual-Bank Flash + 4 Mb SRAM MCP ComboMemory EOL Data Sheet FEATURES: • Flash Organization: 2M x16 – 32 Mbit: 24Mbit + 8Mbit • Concurrent Operation – Read from or Write to SRAM while

ML8464

Contextual Info: May 1997 ML6025 24 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML6025 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 24Mbits/s, with an operating power dissipation of less than 300mW. Its

LF3324

Abstract: line scan sensor synchronizer ccd cmos video delay line
Contextual Info: LF3324 Configurations Modes Applications Random Access X / Horiz. Address LF3324 D x8, x10, x12 Q 24Mbit 2-D Address Space option for simplified image access p Random Access Write with Sequential Read p Random Access Read with Sequential Write p (x8, x10, x12)

Contextual Info: June 1996 MgL M icro Linear ML6025 24 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML6025 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 24Mbits/s, with

Contextual Info: May 1997 3 ^ Micro Linear ML6025 24 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML6025 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 24Mbits/s, with

equalizer ic 5218

Abstract: ML6005 equalizer ic 5216
Contextual Info: June 1992 PRELIMINARY Micro Linear ML6005 24 Mbps Read Channel Filter/Equalizer GENERAL DESCRIPTION FEATURES The ML6005 is a monolithic analog filter/equalizer intended for hard disk drive read channel applications, capable of handling disk data rates upto 24Mbits/s, with

SA70

Abstract: 18FFFFH
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS05-50204-2E Stacked MCP Multi-Chip Package FLASH MEMORY & SRAM CMOS 32M (x 8/×16) FLASH MEMORY & 4M (× 8/×16) STATIC RAM MB84VD2218XEC-90/MB84VD2219XEC-90 MB84VD2218XEE-90/MB84VD2219XEE-90 • FEATURES • Power supply voltage of 2.7 to 3.3 V

endat

Abstract: 7301A
Contextual Info: VM7301 VTC Inc. ZDR DATA SEPARATOR / SYNTHESIZER / ENCODER-DECODER WITH WRITE PRECOMPENSATION V a lu e th e C u s to m e r PRELIMINARY FEA TU R ES Data Synchronizer 1,7 Encoder/Decoder Frequency Synthesizer Write Precompensation 3 - 24 Mbits/sec Data Rate

SA70

Abstract: 22a17
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS05-50207-4E Stacked MCP Multi-Chip Package FLASH MEMORY & SRAM CMOS 32M (x 8/×16) FLASH MEMORY & 8M (× 8/×16) STATIC RAM MB84VD2228XEA/EE-85 MB84VD2229XEA/EE-85 • FEATURES • Power Supply Voltage of 2.7 V to 3.3 V

hd-SDI driver

Abstract: HD-SDI LF44xx SDI SERIALIZER hd-SDI deserializer LF3312 LF3324 LF4460 HD-SDI camera parallel to HD-SDI
Contextual Info: DEVICES INCORPORATED Introducing - HD Frame Memory FRAME MEMORY Spend more time on product differentiation and less time juggling frames of video. Imagine a full-frame HDTV frame store solution in a single, tiny chip. Add a simple, easy to use SRAM interface and flexible addressing

Contextual Info: □□□ □ □□ □ □ DEVICES INCORPORATED □ □ □ □ □□ □ □ □ □ □ □ □□ □ □ □ □ □ □ □ □ □ □ □ □ □□ □ □ □□ □□ □□ LF3324 □□ DD □DddDDdd □□ □ □ □ □□ Product Brief

Contextual Info: M29DW640F 64 Mbit 8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block 3V Supply Flash Memory Features summary • Supply Voltage – VCC = 2.7V to 3.6V for Program, Erase and Read – VPP =12V for Fast Program (optional) ■ Asynchronous Page Read mode – Page Width 8 Words

555H

Abstract: SST34HF3244
Contextual Info: 32 Mbit Concurrent SuperFlash + 4/8 Mbit PSRAM ComboMemory SST34HF3244 / SST34HF3282 / SST34HF3284 SST34HF32x4x32Mb CSF + 4/8/16 Mb SRAM x16 MCP ComboMemory Data Sheet FEATURES: • Flash Organization: 2M x16 or 4M x8 • Dual-Bank Architecture for Concurrent

BA102

Abstract: TOSHIBA TC58 cmos memory -NAND TC58 TC58FVM6B2A TC58FVM6T2A TC58FVM6T2AFT65
Contextual Info: TC58FVM6 T/B 2A (FT/XB) 65 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64MBIT (8M x 8 BITS/4M × 16 BITS) CMOS FLASH MEMORY DESCRIPTION The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 8388608 × 8 bits or as 4194304 × 16 bits. The TC58FVM6T2A/B2A features commands for