24TAP Search Results

ADS62P4X

Abstract: AZ62P44 voltage stabilizer winding data ADS62P42 ADS62P43 ADS62P44 ADS62P45 DA10 marking lpkg
Contextual Info: ADS62P45, ADS62P44 ADS62P43, ADS62P42 www.ti.com . SLAS561B – JULY 2007 – REVISED MAY 2009 DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

Contextual Info: ADS62C15 www.ti.com. SLAS577D – JANUARY 2008 – REVISED JULY 2009 Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

Contextual Info: ADS62P45, ADS62P44 ADS62P43, ADS62P42 www.ti.com . SLAS561B – JULY 2007 – REVISED MAY 2009 DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

Contextual Info: ADS5296A www.ti.com SBAS631 – OCTOBER 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296A FEATURES DESCRIPTION • The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates

ADS62P4X

Contextual Info: ADS62P45, ADS62P44 ADS62P43, ADS62P42 www.ti.com SLAS561A – JULY 2007 – REVISED FEBRUARY 2008 DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS FEATURES 1 • • • • • • • • • • • Maximum Sample Rate: 125 MSPS

Contextual Info: ADS5296A www.ti.com SBAS631 – OCTOBER 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296A FEATURES DESCRIPTION • The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates

3x3 multiplier USING PARALLEL BINARY ADDER

Abstract: correlator implementation of 16-tap fir filter using fpga types of binary multipliers modulating at full adder YD5IN AT40K AT40K40 4x4 bit multipliers basic block diagram of bit slice processors
Contextual Info: An Introduction to DSP Applications using the AT40K FPGA FPGA Application Engineering Atmel Corporation San Jose, California Overview The use of SRAM-based FPGAs in digital signal processing is now considered a viable means of offsetting DSP microprocessor performance limitations in applications that require high

ADS62C15

Abstract: ADS62C15IRGCR ADS62C15IRGCT DA10 DB10 QFN-64
Contextual Info: ADS62C15 www.ti.com. SLAS577D – JANUARY 2008 – REVISED JULY 2009 Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

BCM3040

Abstract: SMATV QAM Encoder 4 QAM modulator QAM Modulator
Contextual Info: BCM3040 UNIVERSAL ADVANCED DOCSIS® 2.0 DOWNSTREAM MODULE SUMMARY OF BENEFITS FEATURES • Integrated QAMLink ® Advanced DOCSIS ® 2.0 downstream modulator • Supports 4, 16, 32, 64, 128, 256, 512 and 1024 QAM • Variable symbol rates up to 10 Mbaud

hf 331

Abstract: hy 214 VCT49 hy 214 A Display hf331 HYT20 5.1 home theatre circuit diagram circuit diagram of video wall AE13 AF14
Contextual Info: GF9320 Scaling Processor GF9320 Data Sheet Features • broadcast quality 10 / 8-bit 24-tap poly-phase horizontal and vertical scalar for HDTV / SDTV video images high performance 2D scaling processor with separate control of horizontal and vertical scaling factors and pan

Contextual Info: ADS62P24, ADS62P25 ADS62P22, ADS62P23 SLAS576C – OCTOBER 2007 – REVISED OCTOBER 2011 www.ti.com DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS Check for Samples: ADS62P24, ADS62P25, ADS62P22, ADS62P23 FEATURES 1 • • • •

3CC7

Contextual Info: Parallel Interface, 625 kSPS, 24-Bit Σ∆ ADC AD7762 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM High performance 24-bit Sigma-Delta ADC 118dB SNR at 78kHz output data rate 106dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate

Contextual Info: ADS62P45, ADS62P44 ADS62P43, ADS62P42 SLAS561C – JULY 2007 – REVISED FEBRUARY 2012 www.ti.com DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS Check for Samples: ADS62P45, ADS62P44, ADS62P43, ADS62P42 FEATURES 1 • • • •

16 QAM receiver block diagram

Abstract: BCM3220 4 QAM receiver block diagram ic with 16 qam modem 4 QAM modulator demodulator modem 256-QAM 16 qam adaptive modem QPSK-16/QAM-Modulator 8 QAM modulator demodulator modem Modulator 64 QAM
Contextual Info: BCM3116 PRODUCT Brief BCM3116 B C M 3 1 1 6 QAMLINK DOCSIS S U M M A R Y F E AT U R E S • Downstream QAM Receiver for North American settop box and DOCSIS cable modem applications. B E N E F I T S modems and cable-TV set-top boxes • Enables the industry’s lowest cost, least complex system

Contextual Info: ADS5292 SLAS788A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com Octal Channel 12-Bit, 80 MSPS and Low-Power ADC Check for Samples: ADS5292 FEATURES DESCRIPTION • • Using CMOS process technology and innovative circuit techniques, the ADS5292 is a low power

Contextual Info: ADS5292 www.ti.com SLAS788B – NOVEMBER 2011 – REVISED JULY 2012 Octal Channel 12-Bit, 80 MSPS and Low-Power ADC Check for Samples: ADS5292 FEATURES DESCRIPTION • • Using CMOS process technology and innovative circuit techniques, the ADS5292 is a low power

Contextual Info: ADS5263 SLAS760 – MAY 2011 www.ti.com Quad Channel 16-Bit, 100-MSPS High-SNR ADC FEATURES DESCRIPTION • • Using CMOS process technology and innovative circuit techniques, the ADS5263 is designed to operate at low power and give very high SNR performance with a 4-Vpp full-scale input. Using a

Contextual Info: GF9320 Scaling Processor GF9320 Data Sheet Features • broadcast quality 10 / 8-bit 24-tap poly-phase horizontal and vertical scalar for HDTV / SDTV video images high performance 2D scaling processor with separate control of horizontal and vertical scaling factors and pan

Contextual Info: ADS62P15 www.ti.com . SLAS572B – OCTOBER 2007 – REVISED APRIL 2009 Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

AZ62P23

Abstract: FS-1000 ADS62P22 ADS62P23 ADS62P24 ADS62P25 ADS62P4X DA10 s0322 AZ62P25
Contextual Info: ADS62P25, ADS62P24 ADS62P23, ADS62P22 www.ti.com SLAS576A – OCTOBER 2007 – REVISED FEBRUARY 2008 DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS • FEATURES 1 • • • • • • • • • • • Maximum Sample Rate: 125 MSPS

ADS62PXX

Abstract: ADS62P15 ADS62P22 ADS62P23 ADS62P24 ADS62P25 ADS62P44 ADS62P45 ADS62P4X AZ62P23
Contextual Info: ADS62P25, ADS62P24 www.ti.com ADS62P23, ADS62P22 REV1P0 SEP 2007 Dual Channel 12-bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs FEATURES § § § § § § § § § Maximum Sample Rate: 125 MSPS 12-bit Resolution with No Missing Codes 92 dB Crosstalk at 50MHz

Contextual Info: ADS5263 www.ti.com SLAS760C – MAY 2011 – REVISED JANUARY 2013 Quad Channel 16-Bit, 100-MSPS High-SNR ADC Check for Samples: ADS5263 FEATURES APPLICATIONS • • • • • 1 • • • • • • • • • • • • • Maximum Sample Rate: 100 MSPS

Contextual Info: HSP43168 Data Sheet July 27, 2009 FN2808.12 Dual FIR Filter Features The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR cells each fed by a

MA2000

Abstract: GC5316
Contextual Info: GC5316 www.ti.com SLWS154A − JANUARY 2004 − REVISED MARCH 2004 HIGHĆDENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER FEATURES D Any DUC Can Sum into Any of Four Output D Optimized for CDMA2000−1X and UMTS D Real/Complex DDC Inputs and DUC Outputs D Programmable AGC on DDC Outputs