25616R Search Results

MH25616RNA

Abstract: MH25616RNA-15 MH25616RNA-2
Contextual Info: MITSUBISHI LSIs M H 2 5 6 1 6 R N A , - 1 5 , - 2 4 1 9 4 3 0 4 -B IT 2 6 2 1 4 4 -W O R D BY 1 6-B IT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M H 25616R N A is 262144-word x 16-bit EPROM and consists o f fo u r industry standard 128K x 8 EPROMs and

sd 0451 55

Abstract: IS65WV25616ALL IS65WV25616BLL IS65WV25616BLL-70TA3
Contextual Info: IS65WV25616ALL IS65WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM PRELIMINARY INFORMATION JUNE 2006 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns • CMOS low power operation 36 mW typical operating 9 µW (typical) CMOS standby

Contextual Info: IS65WV25616ALL IS65WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MAY 2007 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns • CMOS low power operation 36 mW typical operating 9 µW (typical) CMOS standby • TTL compatible interface levels

Contextual Info: IS65WV25616ALL IS65WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEATURES SEPTEMBER 2008 DESCRIPTION The฀ISSI฀IS65WV25616ALL/IS65WV25616BLL฀฀are฀฀high- •฀ High-speed฀access฀time:฀55ns,฀70ns •฀ CMOS฀low฀power฀operation

IS65WV25616ALL

Abstract: IS65WV25616BLL
Contextual Info: IS65WV25616ALL IS65WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM PRELIMINARY INFORMATION JANUARY 2003 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS65WV25616ALL/IS65WV25616BLL are highspeed, low power, 4M bit SRAMs organized as 256K words

Contextual Info: IS65WV25616ALL IS65WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEATURES FEBRUARY 2008 DESCRIPTION The ISSI IS65WV25616ALL/IS65WV25616BLL are high- • • • • • High-speed access time: 55ns, 70ns CMOS low power operation

Contextual Info: ç ,V M ITSUBISHI LS Is 25616RNA, •15, -2 ? > - ! .’ * ' ' ' 4 1 9 4 3 0 4 - B I T 2 6 2 1 4 4 -WORD B Y 16-B IT CMOS E R A S A B LE AND E L E C T R IC A L L Y REPROGRAM M ABLE ROM DESCRIPTIO N ^ The M 25616RNA is 262144-word x 16-bit EPROM and consists of four industry standard 128K x 8 EPROMs and

Contextual Info: IS65WV25616ALL IS65WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM SEPTEMBER 2006 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns • CMOS low power operation 36 mW typical operating 9 µW (typical) CMOS standby • TTL compatible interface levels

Contextual Info: MITSUBISHI LSIs 25616RN A, -15,-2 4 1 9 4 3 0 4 -B IT 2 6 2 1 4 4 - WORD BY 1 6-B IT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M H 2 5 6 1 6 R N A is 262144-w o rd x 16-bit EPROM and 'v , consists o f four industry standard 128K x 8 EPROMs and

IS65WV25616ALL

Abstract: IS65WV25616BLL IS65WV25616BLL-55TA1
Contextual Info: IS65WV25616ALL IS65WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEATURES SEPTEMBER 2008 DESCRIPTION The ISSI IS65WV25616ALL/IS65WV25616BLL are high- • • • • • High-speed access time: 55ns, 70ns CMOS low power operation