|
SN74F112NSR
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SO 0 to 70 |
|
|
|
CD74HC112NSR
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 |
|
|
|
CD74HC112NS
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO |
|
|
|
SN74F125NSR
|
|
Texas Instruments
|
Quadruple Bus Buffer Gate With 3-State Outputs 14-SO 0 to 70 |
|
|
|
SN74AHC125NSR
|
|
Texas Instruments
|
Quadruple Bus Buffer Gates With 3-State Outputs 14-SO -40 to 125 |
|
|
