25TCK Search Results

Contextual Info: I =¥= = = = ’= Advance IBM0664404ET3A IBM0664804ET3A 64Mb Double Data Rate Synchronous DRAM Special Features • 125MHz max clock freq @ CAS Latency=2 • 133MHz max clock freq @ CAS Latency=2.5 • 143MHz max clock freq @ CAS Latency=3 • On-chip DLL to align output data with input clock

Contextual Info: Preliminary KM48H8030T / KM48H8031T KM416H4030T/KM416H4031T 64M DDR SDRAM 64Mb 4Mb x 16, 8Mb x 8 Double Data Rate Synchronous DRAM with Bi-directional Data Strobe • FEATURES • All inputs except data & DM are sampled at the • KM416H4031T, KM 48H8031T

ADSP-2105

Contextual Info: ADSP-2105 March 1990 For current information contact Analog Devices at 617 461-3881 ADSP-2105 DSP Microcomputer FEATURES 100 ns Instruction Cycle with Sustained 10 MIPS Performance ADSP-2100 Family Extension; Code-Compatible ADSP-2101 Pin-Compatible IK Words of On-Chip Program Memory RAM

sem 2105 16 pin

Contextual Info: ADSP-2100 Family DSP Microcomputers ADSP-21XX ANALOG DEVICES SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

Contextual Info: • Q ö l b ö O Q O Q M D Ö Ö b bHfl ■ ANA A N A LO G D EV ICES □ A N AL OG D E V I C E S INC bSE D . DSP Microcomputer ADSP-2101 1.1 Scope. This specification covers the detail requirements for a monolithic CMOS 16-bit fixed-point DSP microcomputer.

Contextual Info: ADSP-2111 March 1990 For current information contact Analog Devices at 617 461-3881 FEATURES 77 ns Instruction Cycle with Sustained 13 MIPS Performance 100-Pin PGA and 100-Lead PQFP ANALOG DEVICES This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices

Contextual Info: DSP Microcomputer with Host Interface Port _ ADSP-211 ANALOG DEVICES □ 1.1 Scope. This specification covers the detail requirements for a monolithic CMOS 16-bit fixed-point DSP micro­ computer with a Host Interface Port HIP .

388F

Contextual Info: ADSP-2171 November 1993 For current information contact Analog Devices at 617 461-3881 ADSP-2171 DSP Microc FEATURES • 30 ns Instruction Cycle Time from 16.67 MHz Crystal <1 5.0 Volts • 33 MIPS Sustained Performance • ADSP-2100 Family Code & Function Compatible with

ADSP21MSP59

Contextual Info: ANALOG DEVICES DSP Microcomputers ADSP-21msp58/59 FEATURES 38 ns Instruction Cycle Tim e 26 MIPS from 13.00 M Hz Crystal ADSP-2100 Family Code and Function Com patible w ith New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplication Instructions, Biased

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.2 March 2005 Samsung Electronics reserves the right to change products or specification without notice.

1AD4

Abstract: ADSP-2186M ADSP-2100 Family EZ-Tools data sheet lsd 3010 A0-A21 ADSP-2100 ADSP-2181 DL195
Contextual Info: ANALOG DSP devices _ Microcomputer □ Preliminary Technical Data ADSP-2186M FEATURES Performance 13.3 ns Instruction Cycle T im e @ 2.5 Volts internal , 75 M IPS Sustained Perform ance Single-Cycle Instruction Execution Single-Cycle C ontext Switch

LS-16M

Abstract: ADSP-2101 XCKM ADSP-2100 ADSP2101BG66 D1742 ADSP-2101KG-50
Contextual Info: ANALOG DEVICES INC Mfc,E D E3 OfllbfiOO D Q a HlSa 2 S A N A -r-¥?-/z^ AMALOG DEVICES DSP Microcomputer ADSP-2101 FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM

Contextual Info: JAN 1 7 1992 ► ANALOG D EVICES FEATURES Com plete DSP M icrocom puter 60 ns Instruction Cycle Tim e from 16.67 M H z Crystal ADSP-2100 Family Code & Function Com patible 2K Words of On-Chip Program M em ory RAM IK Word of On-Chip Data M em ory RAM Separate Program and Data Buses On-Chip

K4D26323QG-GC22

Abstract: K4D26323QG-GC2A K4D26323QGGC2
Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.0 June 2004 Samsung Electronics reserves the right to change products or specification without notice.

K4D26323QG-GC22

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM Revision 1.2 March 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.1 November 2004 Samsung Electronics reserves the right to change products or specification without notice.

marking code BM 68A

Abstract: SP2111/S7 II 1N
Contextual Info: ASF-2100 Family DSP Microcomputers ANALOG DEVICES /SD5P-21xx FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

Contextual Info: ANALOG DEVICES Preliminary Technical Data DSP Microcomputer ADSP-2188M FEATURES Performance 12.5 ns Instruction Cycle Time @ 2.5 Volts internal , 75 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle