28C010T - 12 Search Results

28c010T

Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM FEATURES: DESCRIPTION: • 128k x 8-bit EEPROM • RAD-PAK radiation-hardened against natural space radiation • Total dose hardness: - > 100 krad (Si), depending upon space mission • Excellent Single event effects @ 25°C

Maxwell

Abstract: 28C010T 32-PIN 28C010
Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

F3208

Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE WE Control Logic Timing RES A0 Y Decoder Y Gating X Decoder Memory Array A6 A7 Address Buffer and Latch A16 Memory Data Latch FEATURES:

28C010T - 12

Abstract: 28c010T
Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

d32-02

Abstract: 28C010T 32-PIN
Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 Memory A16 Data Latch FEATURES:

Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

28C010T

Abstract: 32-PIN D32-02
Contextual Info: 28C010T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory Logic Diagram

32-PIN RAD-PAK FLAT PACKAGE

Abstract: 28C010T 28C011T 32-PIN
Contextual Info: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 28C011T Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory

ADC hard radiation

Abstract: 28/ADC hard radiation EEPROM 16MB SCS750 HSN-3000 79LV2040 29F0408 rad-pak 358 9240LP XP-40
Contextual Info: Microelectronics’ Product List Product Description Part Number Radiation Technology Package Screening Style Level FP DIP QFP Specification Status S or B Equivalent Data Sheet Active S, B, I, E S, B, I, E S, B, I, E S, B, I, E S, B, I, E Data Sheet Data Sheet

28C010T

Contextual Info: 28C011T 1 Megabit 128K x 8-Bit EEPROM VCC High Voltage Generator VSS I/O0 I/O7 RDY/Busy RES I/O Buffer and Input Latch OE CE Control Logic Timing WE RES A0 28C011T Y Decoder Y Gating X Decoder Memory Array A6 Address Buffer and Latch A7 A16 Data Latch Memory