300MII Search Results
300MII Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: DRAM MODULE KMM372C400AK/AS KMM372C400AK/AS Fast Page Mode 4Mx72 DRAM DIMM with ECC, 4K Refresh, 5V GENERAL DESCRIPTION FEATURES The Samsung KMM372C400A is a 4M bit x 72 Dynamic RAM high density memory module. The Samsung KMM372C400A consists of eighteen CMOS 4Mx4bit DRAMs in SOJ/TSOP-II 300mii |
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KMM372C400AK/AS KMM372C400AK/AS 4Mx72 KMM372C400A 300mii 48pin 168-pin cycles/64ms 1000mil) | |
Contextual Info: TIEPAL10016P8-3C HIGH-PERFORMANCE ExCL mP A l CIRCUIT D 30 83. D EC E M B E R 1987 • ECL 100K PAL • High-Performance Operation Propagation Delay . . . 3 ns Max JT PACKAG E TOP VIEW I e e • • ■ - 2 2 0 mA Max • Replacement for 100K ECL Logic |
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TIEPAL10016P8-3C 24-Pin, 300-Mii | |
Contextual Info: TM4EP72BPB, TM4EP72BJB, 4194304 BY 72-BIT TM4EP72CPB, TM4EP72CJB 4194304 BY 72-BIT EXTENDED-DATA-OUT BUFFERED DYNAMIC RAM MODULES _ _ • • • • Long Refresh Periods: - TM4EP72CxB: 64 ms 4096 Cycles |
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TM4EP72BPB, TM4EP72BJB, 72-BIT TM4EP72CPB, TM4EP72CJB SMMS886-AUGUST TM4EP72BxB 32M-byte, 168-pin, | |
Contextual Info: SN54F30, SN74F30 8-INPUT POSITIVE-NANO GATES D2932, MARCH 1987-R E V ISE D JANUARY 1989 SN 54F30 . . . J PACKAG E SN 74F30 D OR N P A C K A G E Package Options Includa Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mII |
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SN54F30, SN74F30 D2932, 1987-R 300-mII 54F30 74F30 SN54F30 | |
Contextual Info: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET _ SCAS064A - D3339. JUNE 1989 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation |
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74ACT11112 SCAS064A D3339. 500-mA 300-mii | |
2yl6
Abstract: 74ALS38aM
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SN74ALS38A, SN54ALS38A D2661, 54ALS38A 74ALS38A 300-mii 74ALS38A 2yl6 74ALS38aM | |
LVT16500
Abstract: SN54LVT16500 SN74LVT16500
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SN54LVT16500, SN74LVT16500 18-BIT scbs146a- 1992-revised MIL-STD-883C, 200ns 010D304 LVT16500 SN54LVT16500 SN74LVT16500 | |
ABT22V10-7A
Abstract: ABT22V10-7D ABT22V10-7N
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ABT22V10-7 ABT22V1OA/B 7110fl2b ABT22V10 853-0173D 711Dfl2b ABT22V10-7A ABT22V10-7D ABT22V10-7N | |
SN74ACT7803
Abstract: SN74ACT7805 SN74ACT7813
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SN74ACT7803 SCAS191 50-pF Tbl723 6S8303 SN74ACT7803 SN74ACT7805 SN74ACT7813 | |
100A484Contextual Info: HIGH-SPEED BiCMOS ECL STATIC RAM 16K 4K x 4-BIT SRAM PRELIMINARY IDT10A484 IDT100A484 IDT101A484 FEATURES: DESCRIPTION: • • • • • • • • The IDT10A484, IDT1OOA484 and IDT101A484 are 16,384bit high-speed BiCEMOS ECL static random access |
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IDT10A484 IDT100A484 IDT101A484 IDT10A484, IDT1OOA484 IDT101A484 384bit IDT100A484, 100A484 | |
KM44C4004BContextual Info: KM44C4004BS CMOS DRAM ELECTRONICS 4M x 4 Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This is a family of 4,194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power |
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KM44C4004B KM44C4004BS 0034S12 | |
311 JRCContextual Info: r z j SGS-THOMSON ^ 7 # » ST62T08 K f lO Ê W IlU K g iM IM lK g ê 8-BIT OTP MCUs • ■ ■ ■ ■ ■ ■ 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +85°C Operating Temperature Range Run, Wait and Stop Modes 4 Interrupt Vectors |
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ST62T08 311 JRC | |
ICT 18CV8P
Abstract: 18cv8p 18CV8J 18cv8p-25 ict peel 18cv8 ICT Peel 18CV8J 25 PEEL programming 18CV8 PEEL18CV8P-25
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18CV8 25MHz configuP-15 PEEL18CV8PI-15 PEEL18CV8J-15 PEEL18CV8JÃ PEEL18CV8S-15 PEEL18CV8SI-15 PEEL18CV8T-15 PEEL18CV8TI-15 ICT 18CV8P 18cv8p 18CV8J 18cv8p-25 ict peel 18cv8 ICT Peel 18CV8J 25 PEEL programming PEEL18CV8P-25 | |
Contextual Info: HM514405C Series Preliminary 1,048,576-word x 4-bit Dynamic Random Access Memory HITACHI The Hitachi HM 514405C is a CMOS dynamic RAM o rganized 1,048,576 w ords x 4 bits. HM514405C has realized higher density, higher performance and various functions by employing |
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HM514405C 576-word 514405C HM514405C 300-mil 26-pin | |
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IPDM41027S
Abstract: PDM1027 PDM41027 52HA
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PDM41027S 400mW PDM41027L 350mW MIL-STD-883, PDM41027S PDM41027 IPDM41027S PDM1027 52HA | |
AMD am3 socket pinout
Abstract: amd socket am3 pinout AMD 140 Socket AM3 amd pinout diagram socket AM3 MR 4710 AMD Socket AM3 amd AM3 PIN LAYOUT MR 4710 IC OO3A MARKING AMD socket AM3 pin diagram
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PAL20R8 24-pin 24-pln 28-pin PAL20L8, PAL20R8, PAL20R6, PAL20R4) AMD am3 socket pinout amd socket am3 pinout AMD 140 Socket AM3 amd pinout diagram socket AM3 MR 4710 AMD Socket AM3 amd AM3 PIN LAYOUT MR 4710 IC OO3A MARKING AMD socket AM3 pin diagram | |
5d-22
Abstract: 74F543 N74F543N 74F373 74F543DB 74F544 N74F543D N74F544D N74F544N 74F543D
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74F543, 74F544 74F543 74F544 93-State) Combines74F245 74F373 5d-22 N74F543N 74F543DB N74F543D N74F544D N74F544N 74F543D | |
74F181
Abstract: N74F181D N74F181N
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74F181 300mii-wide 24-pin 500ns 74F181 N74F181D N74F181N | |
Am29CPL151
Abstract: TCO12 tco122 8006 1d AMD 707 024810
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Am29CPL151H-25/33 64-Word Am29PL141 33-MHz 32-blt 28-pin Am29CPL151 cp-10h-12/90-0 TCO12 tco122 8006 1d AMD 707 024810 | |
SMD 5 PIN PAL1
Abstract: 74F5074 74F74
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ABT22V1OA/B ABT22V10 996Feb19 SMD 5 PIN PAL1 74F5074 74F74 | |
Contextual Info: KMM372V400AK/AS DRAM MODULE KMM372V400AK/AS Fast Page Mode 4Mx72 DRAM DIMM with ECC, 4K Refresh, 3.3V GENERAL DESCRIPTION FEATURES The Samsung KMM372V400A is a 4M bit x 72 Dynamic RAM high density memory module. The Samsung KMM372V400A consists of eighteen |
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KMM372V400AK/AS 4Mx72 KMM372V400AK/AS KMM372V400A 300mii 48pin 168-pin | |
74AC11378
Abstract: 74AC11378D 74AC11378N 74ACT11378 74ACT11378D 74ACT11378N
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AC/ACT11378 74AC/ACT11378 74AC/ACT11378 500ft 10MHz 74AC11378 74AC11378D 74AC11378N 74ACT11378 74ACT11378D 74ACT11378N | |
Contextual Info: LH52258A CMOS 32K x 8 Static RAM When E is LOW and W is HIGH, a static Read will occur at the memory location specified by the address lines. G must be brought LOW to enable the outputs. Since the device is fully static in operation, new Read cycles can be |
OCR Scan |
28-Pin, 300-mil LH52258A 28soj300 | |
Contextual Info: SN54HCT534, SN74HCT534 O C TAL D T Y P E EDGE TRIGGERED FLIP-FLOPS W ITH 3-STATE OUTPUTS D2804, MARCH 1984—REVISED SEPTEMBER 1987 Inputs are TTL-Voltage Compatible High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads TOP VIEW Package Options Include Plastic "Small |
OCR Scan |
SN54HCT534, SN74HCT534 D2804, 1984--REVISED 300-MII SN54HCT534 SN54HCT534 |