304PIN Search Results

"network interface cards"

Abstract: DI 783
Contextual Info: „„ RELEASED SIUNI-622-MAX DATASHEET PMC-1980589 • - ■ . PM* I , I 7 IV PMC-Sierra, Inc. ISSUE 6 PM5356 SIUNI-622-MAX SA TURN USER NETWORK INTERFACE 622-MAX PM5356 S/UNI-622-MAX SATURN USER NETWORK INTERFACE (622-MAX) S/UNI- 622-MAX DATASHEET

c4460

Abstract: TMSC44 TMS320C40GFL Texas Instruments processor selection guide 1994 120M 336M LD31 TMS320C44 TMS320C44-50 TMS320C44-60
Contextual Info: TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031C − AUGUST 1994 − REVISED MARCH 2004 D Highest Performance Floating-Point Digital D D D D D D D D D Signal Processor DSP − TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s

EAXXX

Contextual Info: TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031C − AUGUST 1994 − REVISED MARCH 2004 D Highest Performance Floating-Point Digital D D D D D D D D D Signal Processor DSP − TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s

fad27

Abstract: FAD47 FRQ01 FAD21 FAD30 FAD45 FAD26 fca 173 FAD 203 FAD37
Contextual Info: NEUBRIDGE MICROSYSTEMS NEWBRIDGE fc.4E D • b5öölQl JANUARY, 1993 MICROSYSTEMS Fully compatible with IEEE Std 896.1 - 1991 - Profiles A & B register selectable TTL input/output levels Low power CMOS implementation Futurebus+ interface - 896.1 compelled mode data transfer protocol

KL SN 102 94v

Abstract: wire T568 SCV64 The VMEbus Handbook, Fourth Ed VMEbus interface handbook Q002 ih 584 el designer manual kds 1555 SAA 1260 Ka 2535
Contextual Info: O p e n b u s In t e r fa c e C o m p o n e n t s SCV64 User Manual Issue 1 * / • bSflfllDl Q[ D24A0 134 ■ This Material Copyrighted By Its Respective Manufacturer T h e in fo rm a tio n in th is d o c u m e n t is su b je c t to c h a n g e w ith o u t n o tic e an d sh o u ld n o t be c o n stru ed as a

tundra scv64

Abstract: CA91C078 SCH 298 SCV64 D854 btb 137 SCV-64
Contextual Info: Backplane Interface Components - SCV64 User Manual 4 Signals and DC Characteristics 4.1 Terminology The input and output types have all been abbreviated with a letter code. For example, the VDATA31-00 signals are shown as input type CTTL which are CMOS inputs with normal

VDD-1000

Abstract: N04 U1 n057 b n017 PEEL programming ND10 ND12 TQ8033 304-pin dimensions bga nd38
Contextual Info: T H I Q U I N T S E M I C O N D U C T O R , I N C K g TQ8033 PRELIMINARY DATA SHEET Features > 1.5 Gb/s/port data bandwidth; >50 Gb/s aggregate bandwidth • Fully differential data path with 64 inputs and 33 outputs • Non-blocking architecture • 150 ps delay match

Contextual Info: TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031C − AUGUST 1994 − REVISED MARCH 2004 D Highest Performance Floating-Point Digital D D D D D D D D D Signal Processor DSP − TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s

Contextual Info: FLEX 8000 Programmable Logic Device Family May 1999, ver. 10 Features. D a ta she et • ■ ■ ■ ■ Low-cost, high-density, register-rich CMOS programmable logic device PLD family (see Table 1) 2,500 to 16,000 usable gates 282 to 1,500 registers System-level features

PLSM-6402

Abstract: epm9320 10K50 flex 10k20 10K30A
Contextual Info: Ordering Information M a y 19 99, v e r. 10 Altera Devices Figure 1 explains the ordering codes for Altera devices. Devices that have m ultiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to

fp1320

Contextual Info: Guidelines for Handling J-Lead & QFP Devices Ju n e 1996, ver. 2 Introduction Application Note 71 S u rfa c e -m o u n t J-lead a n d q u a d flat p ac k Q FP d ev ic e s a re c u rre n tly in h ig h d e m a n d . A ll d ev ic e p a c k a g e s re q u ire p ro te c tio n d u rin g

Contextual Info: M AX 9000 Programmable Logic Device Family June 1996, VBr. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ H igh-perform ance CM OS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array M atrix

C4460

Contextual Info: TMS320C44 DIGITAL SIGNAL PROCESSOR SPRS031C − AUGUST 1994 − REVISED MARCH 2004 D Highest Performance Floating-Point Digital D D D D D D D D D Signal Processor DSP − TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes / s

F245A

Abstract: UPD4564421 italiana 2000V F244 F245 R4300 VR4300 VR4300TM VRC4373 80 lead flash simm programmer
Contextual Info: V 4373 System Controller RC Data Sheet October 1997 1.0 Introduction 1.1 The VRC4373TM system controller is a software-configurable chip that directly interfaces the VR4300TM CPU and PCI bus without external logic or buffering, and also interfaces memory SDRAM, EDO, fast-page DRAM, and flash boot ROM with minimal buffering. From the viewpoint of the VR4300 CPU, the VRC4373 acts as a memory controller,

transistor f422

Abstract: transistor f423 f422 transistor transistor f421 BV09 F423 fet 13187 RJ4B L442 bvoe
Contextual Info: CMOS-8LCX 3-VOLT, 0.50-MICRON CMOS GATE ARRAYS CROSSCHECK TEST SUPPORT NEC Electronics Inc. Preliminary Description October 1993 Figure 1. Various CMOS-8LCX Packages NEC’s 3-volt CMOS-8LCX family consists of ultra-high performance, sub-micron gate arrays, targeted for

ND53

Abstract: Cascade Microtech 523-0150 523015 5230150 ND48 nd33 nd44 transistor nd44 TQ8033 bunker hill pcb
Contextual Info: T R I Q U I N T S E M I C O N D U C T O R , I N C . TQ8033 DATA SHEET 64 x 33 Crosspoint Switch Matrix Input Buffers 128 CONFIGURE Output Buffers O0–O32 66 33 6-Bit Configuration Latches RESETIN LOAD IADD 0:5 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch

nec 10f

Abstract: uPD65881 IC Ensemble mentor robot MM 5649 A1362 CMOS-N5 NEC lqfp 52
Contextual Info: 0.5µm CMOS Gate Array CMOS-N5 Family New s t c u Prod Features The CMOS-N5 family is a channel-less type gate array that provides high speed operation with a 5-V power supply voltage. Drastic cost reductions have been achieved compared with the conventional CMOS-6 and CMOS-8 families thanks to

7809 voltage regulator datasheet

Abstract: 7809 voltage regulator voltage regulator 7809 INL03991-02 7809 data sheet national semiconductor embedded system projects pdf free download toshiba web cam TB62705 ST 7809 voltage regulator excalibur Board
Contextual Info: & News Views Second Quarter 2001 Newsletter for Altera Customers Altera Provides the Complete I/O Solution with the New APEX II Device Family Altera introduces the APEXTM II device family— flexible, high-performance, high-density programmable logic devices PLDs that deliver

Tundra TSI310

Abstract: Tsi310-133CE Tsi310133-MHz tsi310 "network interface cards"
Contextual Info: Tsi310 Feature Sheet 133 MHz PCI-X Bus Bridge Features The Tsi310 Advantage • Industry-standard 64-bit, 133-MHz PCI-X bridge chip The Tundra Semiconductor Tundra Tsi310 is a 64-bit PCI-X bus bridge that operates at speeds up to 133 MHz, and supports transfer rates up to

qed rm5200

Contextual Info: RM5271 Microprocessor with External Cache Interface Document Rev. 1.3 Date: 02/2000 FEATURES • High-performance floating point unit - up to 700 MFLOPS — Single cycle repeat rate for common single precision operations and some double precision operations

Contextual Info: PI7C8154B Asynchronous 2-Port PCI-to-PCI Bridge REVISION 1.1 3545 North 1st Street, San Jose, CA 95134 Telephone: 1-877-PERICOM, 1-877-737-4266 Fax: 408-435-1100 Email: solutions@pericom.com Internet: http://www.pericom.com PI7C8154B ASYNCHRONOUS 2-PORT

PM5356

Abstract: UNI622-MAX "network interface cards"
Contextual Info: PMC-Sierra, Inc. RELEASED S/UNI-622-MAX PM5356 S/UNI-622-MAX DATASHEET PMC-1980589 ISSUE 6 SATURN USER NETWORK INTERFACE 622-MAX PM5356 S/UNI-622-MAX SATURN USER NETWORK INTERFACE (622-MAX) S/ UNI622-MAX R DATASHEET ISSUE 6: JUNE 2000 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

CRC-32

Abstract: PM5352
Contextual Info: PM5352 S/UNI -155-STAR PMC-Sierra,Inc. 155 Mbit/s ATM and Packet-Over-SONET/SDH Physical Layer Device FEATURES • Performs flag sequence detection and insertion. • Performs CRC-CCITT and CRC-32 FCS generation and validation. • Performs byte stuffing and destuffing.

PM5313

Abstract: PM5342 PM5363
Contextual Info: PMC-Sierra,Inc. PM5363 TUPP+622 Preliminary VT/TU Payload Processor/Performance Monitor for 622 Mbit/s PMC-981272 P2 • SONET/SDH Add/Drop and Terminal Multiplexers • SONET/SDH Broadband Cross-Connects • SONET/SDH and ATM Test Equipment BLOCK DIAGRAM