32A1024L Search Results

Contextual Info: 9: 25 PM FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet Released 9M ay ,2 00 5 11 :2 PM7312 Mo nd ay ,0 FREEDM 32A1024L tis h d of ag er rt on Frame Engine and Data Link Manager 32A1024L Do wn lo ad ed by sa Data Sheet Released Issue 2: Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

hdlc

Abstract: DDLL140 32A1024L FRF-12
Contextual Info: PM7307 FREEDM 32A1024LE Frame Engine and Datalink Manager Released Product Brief FEATURES • Support for three egress fragmentation sizes 128, 256, and 512 bytes configurable per connection. Optionally, full packet transfers are supported on a per connection basis.

hdlc

Abstract: DDLL140 0.18-um CMOS technology 32A1024L
Contextual Info: PM7312 FREEDM 32A1024L Advance Frame Engine and Datalink Manager FEATURES • Single-chip multi-channel packet processor supporting a maximum aggregate bandwidth of 64 Mbit/s for line rate throughput transfers of packet sizes from 40 to 9.6 Kbytes, for up to

Contextual Info: 8: 46 PM FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet Released er ,2 00 4 02 :0 PM7312 sd ay ,2 8O ct ob FREEDM 32A1024L rtm in er In co n Th ur Frame Engine and Data Link Manager 32A1024L Released Issue 2: Do wn lo ad ed by C on te n tT ea m of

Contextual Info: PM7307 FREEDM 32A1024LE Frame Engine and Datalink Manager Released Product Brief FEATURES • Support for three egress fragmentation sizes 128, 256, and 512 bytes configurable per connection. Optionally, full packet transfers are supported on a per connection basis.

Contextual Info: PM7307 FREEDM 32A1024LE Preliminary Frame Engine and Datalink Manager MULTILINK PPP AND FRAME RELAY BUNDLES ,2 00 5 03 :3 9: 01 • Support for 16 COS levels in accordance with RFC 2686. • Either 12 bit or 24 bit sequence number, with short and long fragment

PM820

Abstract: OD54
Contextual Info: 3: 38 PM FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet Released ry ,2 00 5 09 :0 PM7312 sd ay ,0 5J an ua FREEDM 32A1024L in er In co n W ed ne Frame Engine and Data Link Manager 32A1024L Released Issue 2: Do wn l oa de d by Co nt e nt T ea m of

E3 interface

Abstract: PM4323 PM4329 PM7342 PM8312 32A1024L
Contextual Info: PM8312 TEMUX 32 High-Density 32-Channel T1/E1/J1 Framer with Integrated VT/TU Mapper & M13 Multiplexer Released Product Brief PRODUCT OVERVIEW • Flexible line-side and system-side interface support: The PM8312 TEMUX 32 device is a 64-Mbit/s multi-channel T1/E1

PM4329

Abstract: TU12 PM4323 PM7342 PM8312
Contextual Info: PM8312 TEMUX 32 49 AM High-Density 32-Channel T1/E1/J1 Framer with Integrated VT/TU Mappers & M13 Multiplexer Preliminary Product Brief • Stand-alone unchannelized E3 framer mode ITU-T Rec. G.751 or The PM8312 TEMUX 32 device is a 64-Mbit/s multi-channel T1/E1