384MA Search Results

CY37384

Abstract: CY37384V L0651
Contextual Info: = j— PRELIMINARY T. # CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Fully Routable with 100% Logic Utilization Features — JTAG-compliant on-board programming The CY37384V is designed with a robust routing architecture which allows utilization of the entire device with a fixed pinout.

Contextual Info: FAST CMOS OCTAL LATCHED TRANSCEIVER Integrated Device Technology« Inc. IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C FEATURES: DESCRIPTION: • • • • The IDT54/74FCT543/A/C is a non-inverting octal trans­ ceiver built using advanced CEMOS , a dual metal CMOS

Contextual Info: FAST CMOS OCTAL BUS TRANSCEIVER OPEN DRAIN I dt) IDT54/74FCT621T/AT Integrated Device Technology, Inc. DESCRIPTION: FEATURES: • • • • The IDT54/74FCT621T/AT is an octal transceiver with non-inverting Open-Drain bus compatible outputs in both send and receive directions. The B bus outputs are capable

Contextual Info: FAST CMOS OCTAL BUS TRANSCEIVERS 3-STATE Integrated Device Technology, Inc. IDT54/74FCT620T/AT/CT IDT54/74FCT623T/AT/CT FEATURES DESCRIPTION • • • • The IDT54/74FCT623T/AT/CT is a non-inverting octal transceiver with 3-state bus-driving outputs in both the send

CY37384

Abstract: CY37384V
Contextual Info: PRELIMINARY CY37384 UltraLogic 384-Macrocell ISR™ CPLD — tS = 5.5 ns Features • 384 macrocells in 24 logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • • • • — Design changes don’t cause pinout changes

P300E-24

Abstract: P300E P150E12 P1500E-24 P150E-15 P15E-24 p150e-24 P600E-12 P1500E-5 P15E-12
Contextual Info: Ordering information Unit type P15E P P 1 15 2 E 3 -5 4 -O 5 1Series name 2Output wattage 3UL recognized,TuV approved, CSA certified:E 4Output voltage 5Optional C :with Coating G :Low leakage current J :Connector type N :with Cover R MODEL MAX OUTPUT WATTAGE[W]

Contextual Info: ! ^ jjjjjy '•ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- JM N K t t ♦ < ij / 5; PRELIMINARY *^ ' CY37384 UltraLogic 384-Macrocell ISR™ CPLD — ts = 5.5 ns Features — tco = 6 ns • 384 macrocells in 24 logic blocks • In-System Reprogrammable™ (ISR™

t 2563

Abstract: S 2563
Contextual Info: FAST CMOS OCTAL BUS TRANSCEIVERS 3-STATE IDT54/74FCT623T/AT/CT Integrated Device Technology, Inc. FEATURES: DESCRIPTION • • • • Th e F C T 623T/A T/C T is a non-inverting octal transceiver with 3-state bus-driving outputs in both the send and receive

P300E-24

Abstract: P1500E-24 P300E-5 P600E-24 RP300E P150E12 P300E-15 PT1500U-24 P15E5 p150e-24
Contextual Info: Ordering information Unit type P15E P P 1 15 2 E 3 -5 4 -O 5 1Series name 2Output wattage 3UL recognized,TuV approved, CSA certified:E 4Output voltage 5Optional *3 C :with Coating G :Low leakage current J :Connector type N :with Cover R MODEL MAX OUTPUT WATTAGE[W]

CHN 617

Abstract: b811d
Contextual Info: : S IN æi K/ FAST CMOS IDT54/74FCT621 T/AT OCTAL BUS T R A NSCE I VER OPEN DRAI N Integrated Device Technology, Inc. DESCRIPTION: FEATURES: • • • • • • • • • • Std. and A speed grades Low input and output leakage <1p.A (max.) Extended comm ercial range of -4 0 °C to +85°C

AM2952

Contextual Info:  FAST CMOS OCTAL REGISTERED TRANSCEIVERS IDT29FCT52A/B/C IDT29FCT53A/B/C Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Equivalent to AMD’s Am2952/53 and National’s 29F52/53 in pinout/function • IDT29FCT52A/53A equivalent to FAST speed

CY37384

Abstract: CY37384V cpld internal
Contextual Info: Back PRELIMINARY CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Features — tPD = 15 ns — tS = 8 ns • 384 macrocells in 24 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • •

Contextual Info: R DS095 v2.6 January 30, 2005 XC2C384 CoolRunner-II CPLD Preliminary Product Specification Features Description • The CoolRunner-II 384-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

Contextual Info: R DS095 v1.1 August 20, 2002 XC2C384 CoolRunner-II CPLD Advance Product Specification Features Description • The CoolRunner-II 384-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

HPD15

Contextual Info: HPD15 SERIES Single, dual and triple output • • • • • • 2.0 x 2.0 x 0.4 inch package singles and duals 2:1 wide input voltage range 30 models available including 2.1V and 3.3V outputs Indefinite short circuit protection EN55022 conducted emissions level A

ultraISR CABLE

Contextual Info: PRELIMINARY CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Fully Routable with 100% Logic Utilization Features The CY37384V is designed with a robust routing architecture which allows utilization of the entire device with a fixed pinout. This makes Ultra37000 optimal for implementing on-board design changes using ISR without changing pinouts.

ISL6258

Abstract: ISL6258A SIS630 ISL6265 isl6236 ISL6754 ISL6753 EL7156 isl8121 ISL6566
Contextual Info: 10 Power Management 2009 P RODUCT S ELECTION GUIDE Power Management pg. 10-1 Battery Management (pg. 10-2) Isolated Power (pg. 10-9) LNB Controllers (pg. 10-11) Power Supply Support (pg. 10-17) Power MOSFET Drivers (pg. 10-12) Switching Regulation (pg. 10-23)

Contextual Info: bq24296M SLUSBU3 – FEBRUARY 2014 I2C Controlled 3A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG 1 Features • • 1 • • • • • • • 90% High Efficiency Switch Mode 3A Charger 3.9V-6.2V Single Input USB-compliant Charger

NCL025

Abstract: tms 0119 Ol73 CY37384P208-66NC 256-pin Plastic BGA 17 x 17 T-33-I u175
Contextual Info: J ^ m n rn n : if : Y PRELIMINARY H Ultra37384 - UltraLogic 384-Macrocell ISR™ CPLD Features — ts = 5.5 ns — tc o = 6 ns • 384 m a cro c ells in 24 logic blocks • P ro d uct-term clocking • In-S ystem R ep ro g ra m m ab le ™ IS R ™

2005Z

Abstract: TRANSISTOR a105 a105 transistor 2005 Z 2005.z SXA3318BZ JESD22-A113C spa2318z JESD22-A-102 JESD22-A104B
Contextual Info: Reliability Qualification Report SPA-2318 - SnPb Plated SPA-2318Z - Matte Sn, RoHS compliant Products Qualified by Similarity SPA-1118 SPA-1218 SPA-1318 SPA-2118 SXA-3318B SPA-1118Z SPA-1218Z SPA-1318Z SPA-2118Z SXA-3318BZ The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for

Integreted circuit

Contextual Info: IDT54/74FCT621T/AT FAST CMOS OCTAL BUS TRANSCEIVER OPEN DRAIN MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT621T/AT FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN) Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • • The IDT54/74FCT621T/AT is an octal transceiver with

k1358

Abstract: COOLRUNNER-II ucf file tq144 COOLRUNNER-II ucf file XAPP399 F14152 XAPP393 XC2C64 manual XAPP 138 data CP132 -20/COOLRUNNER-II ucf file tq144
Contextual Info: Application Note: CoolRunner-II CPLDs R Assigning CoolRunner-II VREF Pins XAPP399 v1.1 July 25, 2003 Summary The flexibility of the CoolRunner -II CPLD allows users to configure any I/O pin to act as a voltage reference (VREF) pin. This document describes the different methods and underlying

Contextual Info: R DS095 v2.0 May 30, 2003 XC2C384 CoolRunner-II CPLD Advance Product Specification Features Description • The CoolRunner-II 384-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment

Contextual Info: SPNf jcfcy Integrated De>rice Technology, Inc. FAST CMOS OCTAL BUS TRANSCEIVERS 3-STATE IDT54/74FCT620T/AT/CT IDT54/74FCT623T/AT/CT FEATURES: DESCRIPTION • • • • Th e ID T 5 4 /7 4 F C T 6 2 3 T /A T /C T is a non-inverting octal transceiver with 3-state bus-driving outputs in both the send