400MBPS Search Results

Contextual Info: IDB-1394 Single Chip Controller MB88388A, MB88389 400Mbps 800Mbps & SoC In-Car Rear Seat Entertainment Network MB88388A BT.601 & Audio SmartCODEC MB88387 MPEG & Audio Front Display for a Head Unit BT.601 & Audio SmartCODEC x 2-ch BT.601 & Audio SmartCODEC

CS6703

Abstract: QSOP16 Package
Contextual Info: Myson-Century Technology CS6703 200Mbps Fiber-Optic VCSEL/Laser Driver FEATURES The CS6703 is a high-speed fiber optic VCSEL driver ideally suited for applications up to 400Mbps. The CS6703 is programmable and has fully differential PECL data inputs and CMOS control

Contextual Info: PRELIMINARY INFORMATION L9D222G72BG3 2.2 Gb, DDR2, 32 M x 72 Integrated Module IMOD Benefits FEATURES DDR2 SDRAM Data Rate = 800,667,533 and 400Mbps Available in INDUSTRIAL, EXTENDED and MIL-TEMP Package: 16mm x 22mm – 208PBGA, 1.00mm pitch Differential Data Strobe (DQS, DQSx\) per byte

AM26LS32

Abstract: STLVDS32 STLVDS32BD STLVDS32BDR STLVDS32BTR TSSOP16
Contextual Info: STLVDS32 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

STLVDS32BTR

Abstract: AM26LS32 MC3486 STLVDS32 STLVDS32BD STLVDS32BDR
Contextual Info: STLVDS32 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

LVDS Repeater

Abstract: MAX9180EXT-T
Contextual Info: 19-2376; Rev 1; 2/04 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package The MAX9180 is a 400Mbps, low-voltage differential signaling LVDS repeater, which accepts a single LVDS input and duplicates the signal at a single LVDS output. Its low-jitter, low-noise performance makes it

MD8405E

Abstract: uPD72850 uPD72850A uPD72850AGK-9EU S100 S200
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD72850A IEEE1394 400Mbps PHY The µPD72850A is the 3-port physical layer LSI which complies with the P1394a draft 2.0 specifications. The µPD72850A works up to 400 Mbps. It is an upgrade of NEC's µPD72850. FEATURES • The Three-port Physical Layer LSI complies to IEEE P1394a draft 2.0

CS6703

Abstract: TSSOP-16
Contextual Info: Century Semiconductor Inc. CS6703 200Mbps Fiber-Optic VCSEL/Laser Driver GENERAL DESCRIPTION FEATURES The CS6703 is a high-speed fiber optic VCSEL driver ideally suited for applications up to 400Mbps. The CS6703 is programmable and has fully differential PECL data inputs and CMOS control

Contextual Info: STLVDS32 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

SN65LVD32

Contextual Info: STLVDS32 STLVDS3486 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

PS3 transmitter

Abstract: S100 S1R72801F00A S1R72900F00A S200 S400 circuit diagram of 27 mhz transmitter 16 pin ic third party ps3 controller
Contextual Info: PF1165-03 S1R72900F00A S1R72900F00A IEEE1394 PHY LSI y ar n i m i l e r P ● IEEE1394-1995, 1394a-2000 compliant ● 400Mbps high-speed transfer supported ● 2 port • DESCRIPTION The S1R72900F00A is an IEEE 1394-1995 Standard and the IEEE 1394a-2000 Standard compliant physical

FW643E2

Abstract: FW643E FW643 IEEE1394a 10PIN 1394B 20PIN IEEE1394B PCI Express IEEE-1394b
Contextual Info: PCI Express mini card IEEE1394 Module PCI Express mini Card MPX-643 Support IEEE1394A & 1394B Support Plug and Play Form Factor PCI Express mini card Controller LSI FW643E2 Features 1 x IEEE1394A provides up to 400Mbps of transferring rate 2 x IEEE1394B provides up to 800Mbps of transferring rate

MD8405

Abstract: NMOS sony data sheet MD8405E uPD72850 uPD72850A uPD72850AGK-9EU S100
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD72850A IEEE1394 400Mbps PHY The µPD72850A is the 3-port physical layer LSI which complies with the P1394a draft 2.0 specifications. The µPD72850A works up to 400 Mbps. It is an upgrade of NEC's µPD72850. FEATURES • The Three-port Physical Layer LSI complies to IEEE P1394a draft 2.0

SP400

Contextual Info: July 1998 Edition 1.0 - PRELIMINARY : FUJITSU DATA SH EET MB86614 IEEE 1394 Serial Bus Controller 400Mbps DESCRIPTION Fujitsu MB86614 is a high-performance 1394 serial bus controller device conforming to IEEE1394 standard (IEEE1394-1995), Revision 8.0 Ver.2 and p1394a draft (rev 1.1). It has two

uPD72850

Abstract: uPD72850A uPD72850AGK-9EU S100 MD8405E Nec Infrared protocol decoder
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD72850A IEEE1394 400Mbps PHY The µPD72850A is the 3-port physical layer LSI which complies with the P1394a draft 2.0 specifications. The µPD72850A works up to 400 Mbps. It is an upgrade of NEC's µPD72850. FEATURES • The Three-port Physical Layer LSI complies to IEEE P1394a draft 2.0

IEC60958

Abstract: I2S serial bus protocol BT601 IEC-60958 BT.601 parking aid IEEE-1394b-2008 MB88395 4096B IEC-61883
Contextual Info: 1394 Automotive Single Chip Controller MB88395 and MB88389 400Mbps 800Mbps In-vehicle entertainment MB88395 BT.601 SmartCODEC 800Mbps and SoC 3.2Gbps and SoC MB8839x * BT.601 Audio SmartCODEC 2ch 2ch BT.601 Audio SmartCODEC 2ch 2ch DTCP Audio DTCP LINK 800Mbps PHY

AM26LS32

Abstract: STLVDS32 STLVDS32BD STLVDS32BDR STLVDS32BTR TSSOP16
Contextual Info: STLVDS32 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

IN50

Abstract: MAX9121 MAX9129 MAX9180 MAX9180EXT-T MAX9181 SC70-6
Contextual Info: 19-2376; Rev 0; 4/02 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package The MAX9180 has fail-safe circuitry that sets the output high for undriven open, short, or terminated inputs. The MAX9180 operates from a single 3.3V supply and consumes only 10mA over a -40°C to +85°C temperature range. Refer to the MAX9129 data sheet for a quad

Contextual Info: FireWire IEEE 1394 Cable 4pin/4pin 6-ft. MODEL NUMBER: F009-006 Highlights Premium quadruple-shielded cables with tinned copper braid and aluminum mylar foil on each twisted pair as well as on the cable as a whole Supports data transfer rates up to 400Mbps

STLVDS32

Abstract: STLVDS3486 STLVDS9637BD STLVDS9637BDR
Contextual Info: STLVDS9637 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

SN65LVD3486

Abstract: MC3486 STLVDS3486 STLVDS3486BD STLVDS3486BDR STLVDS3486BTR TSSOP16
Contextual Info: STLVDS3486 HIGH SPEED DIFFERENTIAL LINE RECEIVERS • ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS

Contextual Info: 19-2130; Rev 0; 8/01 KIT ATION EVALU ABLE AVAIL 10-Bit Bus LVDS Deserializers The MAX9206/MAX9208 receive serial data at 400Mbps and 600Mbps, respectively, over board traces or twisted-pair cables. These devices combine frequency lock, bit lock, and frame lock to produce a

L9D222G72BG3

Contextual Info: PRELIMINARY INFORMATION L9D222G72BG3 2.2 Gb, DDR2, 32 M x 72 Integrated Module IMOD Benefits FEATURES DDR2 SDRAM Data Rate = 800,667,533 and 400Mbps Available in INDUSTRIAL, EXTENDED and MIL-TEMP Package: 16mm x 22mm – 208PBGA, 1.00mm pitch Differential Data Strobe (DQS, DQSx\) per byte

VIA 1394

Abstract: BGA-112P-M01 mb86614 80p11
Contextual Info: February 1999 Edition 2.0 DATA SHEET MB86614 IEEE 1394 Serial Bus Controller 400Mbps DESCRIPTION Fujitsu MB86614 is a high- performance 1394 serial bus controller device conforming to IEEE1394 standard (IEEE1394- 1995), Revision 8.0 Ver.2 and p1394a draft (rev 1.1). It has two