4MBIT ROM Search Results

mask ROM

Contextual Info: PRODUCT SPECIFICATIONS Integrated Circuits Group LH53F4P00 4M Mask ROM Model No.: LHMD09xx Ref No.: NP 176C Issue Date: April 1997 4Mbit, Mask ROM, 5V, 120 ns, 44 SOP, LH53F4P00

Contextual Info: HYUNDAI HY234100 Series 512KX 8-bit/256K X 16-bit CMOS MASK ROM PRELIMINARY DESCRIPTION The HY234100 is a 4Mbit mask-programmable ROM organized either as 524,288 x 8bit Byte mode or as 262,144 x 16bit (Word mode) depending on BHE level. It is fabricated using HYUNDAI'S advanced CMOS process

KMCJ532512

Abstract: KM23C1000-20 KM28C64B KMM594 KM718B90-12 zip 40pin 30-pin simm memory "16m x 8" KM41C4000C-6 KM41C16000ALL KM48V2104AL
Contextual Info: FUNCTION GUIDE MEMORY ICs 1. 1.1 INTRODUCTION Dynamic RAM KM41C1000C-6 1Mx1 KM41C1000CL-6 KM41C1000CSL-6 25 6Kx4 KM44C256C-6 KM44C256CL-6 KM44C256CSL-6 4Mbit— 4Mx1 T KM41C4000C-5 — KM41C4000C-6 KM41C4000C-7 KM41C4000C-8 KM41C4000CL-5 KM41C4000CL-6 KM41C4000CL-7

ir transmitter led 880nm

Abstract: "universal remote control" chip LED IR RX mir 3 ir receiver circuit AC97 AN1114 ASDL-3023 ASDL-3023-008 ASDL-3023-021 ASDL-3023-S21
Contextual Info: ASDL-3023 IrDA Data Compliant Low Power 4Mbit/s with Remote Control Infrared Transceiver Data Sheet Description Features The ASDL-3023 is a new generation low profile high speed enhanced infrared IR transceiver module that provides the capability of (1) interface between logic

LEXAN 940

Abstract: photodiode 011
Contextual Info: ASDL-3023 IrDA Data Compliant Low Power 4Mbit/s with Remote Control Infrared Transceiver Data Sheet Description Features The ASDL-3023 is a new generation low profile high speed enhanced infrared IR transceiver module that provides the capability of (1) interface between logic

STR S 6307

Abstract: str 6307 uP 6308 AD STR 6309 STR 6307 POWER uP 6308 AP str s 6309 LT 7224 of str 6309 str 6308
Contextual Info: 7224 CONTROLLER FOR 4MBIT BPK 5V74 BUBBLE MEMORY SUBSYSTEM • Provides Interface between Host Microprocessor and 4 Mbit Bubble Memory Subsystems ■ 18 Easy-to-Use Commands . Three Modes of Data Transfer _ ■ Interlaces to 8080/85/86/88/186/286 and Other Standard Microprocessors

AC97

Abstract: AN1114 ASDL-3023 ASDL-3023-008 ASDL-3023-021 ASDL-3023-S21 IEC825 ir transmitter led 880nm 47w marking lexan 21051
Contextual Info: ASDL-3023 IrDA Data Compliant Low Power 4Mbit/s with Remote Control Infrared Transceiver Data Sheet Description Features The ASDL-3023 is a new generation low profile high speed enhanced infrared IR transceiver module that provides the capability of (1) interface between logic

AVR 8515 microcontroller

Abstract: FPGA AMI coding decoding tri state AOI222 AOI2223 AOI2223H AOI222H ATL35 0.35-um CMOS standard cell library inverter
Contextual Info: Features • System Level Integration Technology • 0.35 µm Geometry in Triple-level Metal • I/O Interfaces; CMOS, LVTTL, LVDS, PCI, USB – Output Currents up to 20 mA, 5V Tolerant I/O • Embedded Flash Memory with Capacities of 1Mbit, 2Mbit or 4Mbit

ir transmitter led 880nm

Abstract: Wet tantalum capacitor
Contextual Info: ASDL-3023 IrDA Data Compliant Low Power 4Mbit/s with Remote Control Infrared Transceiver Data Sheet Description Features The ASDL-3023 is a new generation low profile high speed enhanced infrared IR transceiver module that provides the capability of (1) interface between logic

max3843

Abstract: pc646
Contextual Info: PSD835G2V Flash PSD, 3V Supply, for 8-bit MCUs 4Mbit + 256 Kbit Dual Flash Memories and 64Kbit SRAM PRELIMINARY DATA FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ FLASH IN-SYSTEM PROGRAMMABLE ISP PERIPHERAL FOR 8-BIT MCUs DUAL BANK FLASH MEMORIES

Contextual Info: HY234000 Series “H Y U N D A I 512K X 8-bit CMOS MASK ROM PRELIMINARY DESCRIPTION The HY234000 is a 4Mbit mask-programmable ROM organized as 524,288 x Sbit. It ¡sfabricated using HYUNDAI'S advanced CMOS process technology. The HY234000 operates with a 5V power supply and all inputs are TTL

23C1001

Abstract: KMM5334100 km 23c 4000B KMM5362003C KM681001-25 KM68V257 KM428V256 23c4001 4100C M681000
Contextual Info: FUNCTION GUIDE MEMORY ICs 1. INTRODUCTION 1.1 Dynamic RAM 1Mx1 KM41C1000C-6 KM41C1000CL-6 KM41C1000CSL-6 256Kx4 4Mbit— 4Mx1 KM44C256C-6 KM44C256CL-6 KM44C256CL-7 KM 44C256CL-8 - KM44C256CSL-6 KM44C256CL-7 KM 44C256CL-8 — KM41C4000C-7 — KM41C4000C-8 KM41C4000C-5

Contextual Info: •H Y U N D A I HY234100 Series 512KX 8-b¡t/256KX 16-bit CMOS MASK ROM PRELIMINARY DESCRIPTION The HY234100 is a 4Mbit mask-programmable ROM organized either as 524,288 x 8bit Byte mode or as 262,144 x 16bit (Word mode) depending on BHE level. It is fabricated using HYUNDAI'S advanced CMOS process

Contextual Info: NMOS 4Mbit MASK ROM 524,288wordx8bit RP234096 The R P234096 is static NM OS Read O nly Memory • P IN C O N F IG U R A T IO N ( Top view ) organized as 5 2 4288 words X 8 bits and operates from a single + 5 V Supply. And the consumption current Al 7 [ 1

lh5s4axx

Abstract: sharp mask rom LH53F4600 lh5s4 LH5S flash memory 4m 44-pin
Contextual Info: LH53F4600 4M Mask ROM SHARP LH53F4600 • Description Flash Memory Compatible pinout 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53F4600N User’s No. : LH-5S4ZXX is a CMOS 4Mbit mask-programmable ROM organized as 524 288 X 8 bits (Byte mode) or 262 144 X 16 bits (Word mode) that can be

RP234096

Contextual Info: It rui JL ^PRELIMINARY! / EK-0 4 3 -9 0 0 4 NMOS 4Mbit MASK ROM 524,288word x 8bit RP234096 The RP234096 is static NMOS Read Only Memory organized as 5 2 4 28 8 words a single + 5 V Supply. X I PIN C O N F IG U R A T IO N 8 bits and operates from And the consumption current

Contextual Info: V59C1256 404/804/164 QI HIGH PERFORMANCE 256 Mbit DDR2 SDRAM 4 BANKS X 16Mbit X 4 (404) 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 37 3 25A 25 19A DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

Contextual Info: V59C1256 404/804/164 QI HIGH PERFORMANCE 256 Mbit DDR2 SDRAM 4 BANKS X 16Mbit X 4 (404) 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 37 3 25A 25 19A DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

Contextual Info: RICOH CORP/ ELECTRONIC 54E D K D fBC D D G • TTHHbTG aQQ2G77 256 7 IS E K -0 7 3 -9 2 0 3 CMOS 4Mbit MASK ROM RP/RF534040E 524,288 word x 8 bit / 262,144 word * 1 6 bit RP/RF534040E is a 4 Mbit programmable mask ROM using CMOS process technology. It has also been provided with a power down function which reduces supply current from 50mA (Max.)

Contextual Info: V59C1256 404/804/164 QI HIGH PERFORMANCE 256 Mbit DDR2 SDRAM 4 BANKS X 16Mbit X 4 (404) 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 37 3 25A 25 19A DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

I28F400

Abstract: 80L188EB 82360SL intel PLD D773
Contextual Info: A D V A N C E IN F O R M A T IO N in te i INTEL CORP MEMORY/PLD/ SbE » • 4fl2bl7b Da773Sa TßH ■ I T L E 28F400BX-TL/BL, 28F004BX-TL/BL - T qt (3> 2 6 4MBIT (256K x16, 512K x8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY I Low Voltage Operation for Very Low

Contextual Info: RICOH CORP/ EL ECTRONIC It SME D • 7 7 M 4 b ciG GGDSOTfl TflE m P C H EK-043-9004 NMOS 4Mbit MASK ROM RP234096 ^ 524,288w ordx8bit The R P234096 is static NM O S Read Only Mem ory ■ P IN C O N F IG U R A T IO N VMs-tr ( Top view ) organized as 5 2 4 2 8 8 words X 8 bits and operates from

Contextual Info: K D i i G O CMOS 4Mbit MASK ROM RP/RF534040E 5 2 4 , 2 8 8 w o rd x 8 bit / 2 6 2 , 1 4 4 w o rd * 1 6 b it R P /R F 5 3 4 0 4 0 E is a 4 M b it p ro g ra m m a b le m a s k R O M using C M O S p ro c e s s te c h n o lo g y . It h a s a ls o b e e n p ro v id e d w ith a p o w e r d o w n fu n c tio n w h ic h re d u c e s s u p p ly c u rre n t fro m 5 0 m A

C1157

Abstract: 74HCU04 MSM9800 MSM9805 EPROM 28 PINS "Piezo Speaker" Amplifier
Contextual Info: E2D0107-19-93 ¡ Semiconductor MSM9800 EVA BOARD ¡ Semiconductor This version:EVA Sep. 1999 MSM9800 BOARD Voice ROM Evaluation Board For MSM9802/9803/9805 GENERAL DESCRIPTION The MSM9800 EVA BOARD is an EPROM Evaluation board that enables the user to evaluate