4XXXB Search Results

Contextual Info: R&E 4555B 4556B INTERNATIONAL, INC. CMOS DUAL 2-T0-4 LINE DECODERS FEATURES ♦ Buffered Outputs ♦ Selected Output Active High 4555B or Active Low (45S6B) Expandable ♦ CONNECTION D IA G R A M (all packages) Vd d I 16 DESCRIPTION The 4555 B and 4556B are constructed

Contextual Info: 4518B 4520B INTERNATIONAL, INC. CMOS DUAL UP COUNTERS FEATURES 4 Two Independent 4-B it Counters 4 Internally Synchronous fo r High Speed Dual BCD 4518B and Dual Binary (4520B) Configurations 4 D irect Reset 4 Logic Edge-Clocked Design 4 Trigger from either Edge o f Clock Signal

Contextual Info: MOTOROLA S_C { L O G I C } 6367252 M O TO RO LA SC Hfl D E | > 3 t>7 ESH O d T ' H m C L O G I C _ _ _ _ _9 8 0 _ M O T O R O _ 3 79914 _ T ~ V £ '0 7 MC 14582B L A CMOS MSI LOOK-AHEAD CARRY BLOCK LO W -PO W ER C O M P L E M E N T A R Y M OS)

BU4000

Contextual Info: Standard ICs I Dual 4-bit static shift register | BU4015B/BU4015BF The BU4015B and BU4015BF are 4-stage static shift registers, each consisting of two circuits. The D flip-flops for each stage share a com m on reset input, enabling external asynchronous reset at any point.

4017 decade counter circuit diagram

Abstract: 4017B 40178 PIN DIAGRAM OF 4017 DECODED DECADE 4017 C mos pin configuration 4017b pin configuration 4017 CMOS 4017 series cmos 4017 4022B
Contextual Info: COS/MOS 40173 INTEGRATED CIRCUITS ' HCC/HCt^OZZB C O U N T E R /D IV ID E R S : 4017B - DECADE C O U N T E R W IT H 10 D EC O D E D OU TPU TS 4022B - O C T A L C O U N T E R W IT H 8 D EC O D E D OU TPU TS • • • • • • • • F U L L Y STATIC OPE RATION

scl4000

Contextual Info: 1 800 253-7007 R&E INTERNATIONAL. INC SCL4021B LOGIC D IA G R AM EIGHT S T A G E S T A T IC S H IFT R E S IS T B t SER V o 0 Pl-7 Pl-6 PI-6 IN 07 J_I_ l- 1-1-L 16 IS 1 P I-8 H 3 2 1 I Q6 08 13 1Z 4 5 I 11 6 I P I-4 P I-3 CL P/S 10 9 7 1 I P I-2

SCL4000B SERIES FAMILY SPECIFICATIONS

Abstract: SCL4000B
Contextual Info: R&E INTERNATIONAL. INC. 1 800 253-7007 SCL4001UB SCL4011UB UNBUFFERED QUAD TW O INPUT NOR QATE 48 4A 4Y 3Y 36 | | | | 10 | 1 8 > 46 | 4A 1 4Y 1 3Y 1 38 j 3A 1 9 8 14 13 12 11 10 9 8 6 7 1 v ss 1 1 1A 2 18 3 1 IV 4 1 3Y 5 1 JA 6 1 36 7 1 V ss 13 u UNBUFF W E D QUAD TW O INPUT H A ND QATE

Contextual Info: [2] The L-MOS Series 1. Features of the L-MOS Series 1 The L-M OS series are sm all-package SM D type devices: T C 7 S x x F U , T C 7 S H x x F U , T C 7 S L x x F U Series. 2.0 x 1.25 x 0.9m m ultra super-mini 5-pin package. T C 4S xxF , T C 7 S x x F , T C 7 S H x x F , T C 7 S L x x F Series.

14052b

Abstract: 14051b C14052 14053B MC14051 C14052B
Contextual Info: g MC14051B MC14052B MC14053B M OTOROLA ANALOG M U LT IP L E X E R S /D E M U L TIP LE X E R S The M C14051B, M C14052B. and M C14053B a n a lo g m u ltip le x e r s a re d ig ita lly - c o n tr o lle d a n a lo g s w itc h e s . T h e M C 1 4 0 5 1 B e ffe c tiv e ly im p le m e n ts an S P 8 T s o lid s ta te s w itc h , th e

TB1253N

Abstract: TB1240 TA8792N TA8792 tb1238 f062dsl TC90A65F TB1238BN F1814B LB 122s
Contextual Info: 2000-2 エネルギーとエレクトロニクス 東芝半導体システムカタログ TV編 Y1A1AH TVの機能別基本ブロック図 音声処理部 周波数シンセサイザ部 音声多重復調 SIF UHF/VHF チューナ サラウンド 機能 SAW

SCL4000B

Contextual Info: 4508B INTERNATIONAL, INC CMOS DUAL 4-BIT LATCH FEATURES ♦ ♦ ♦ ♦ Two Independent Four-Bit Latches 3-State Outputs Direct Reset All Inputs Buffered CONNECTION DIAGRAM alt packages Q3g Q2g Q1 B QOg Disg MRg D3B D1B I d o b 1 D2B stb I V DD l 1 1 1 _L_J_I_ _i_L_