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    5962-8864

    Contextual Info: PACE1753 SINGLE CHIP, 40MHz CMOS MMU/COMBO FEATURES • ■ implements the MIL-STD-1750A Instruction Set Architecture for Memory Management and Protection of up to 1 Megaword. All mapping memory 10,240 bits for both the MMU and BPU functions are Included on the chip.


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    PACE1753 40MHz MIL-STD-1750A PACE1750A/AE 16-bit, PACE1754 P1753-20QLMB P1753-20QGMB P1753-20PGMB P1753-30QLMB 5962-8864 PDF