512X1 Search Results

ACT7804-20

Abstract: SN74ACT7804 SN74ACT7806 SN74ACT7814
Contextual Info: SN74ACT7804 512x18 STROBED FIRST-IN, FIRST-OUT MEMORY S C A S 2 0 4 A -A P R IL 1992 - REVISED S E P TEM B E R 1995 Member of the Texas Instruments Widebus Family Load Clock and Unload Clock Can Be Asynchronous or Coincident 512 Words by 18 Bits Low-Power Advanced CMOS Technology

LA 7804 ON

Abstract: ci LA 7804 ON SN74ACT7804 SN74ALVC7804 W256
Contextual Info: SN74ALVC7804 512x18 FIRST-IN, FIRST-OUT MEMORY SCAS432 - JANUARY 1995 DL PACKAGE TOP VIEW • Operates at 3-V to 3.6-V V c c * Load Clock and Unload Clock Can Be Asynchronous or Coincident RESET [ 1 • Low-Power Advanced CMOS Technology D17 [ 2 * Full, Empty, and Half-Full Flags

Contextual Info: I = = = = •= Preliminary IBM0418A81QLAA IBM0418A41 QLAA IBM0436A81QLAA IBM0436A41QLAA 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations

Contextual Info: I = =• = Preliminary IBM0418A80QLAB IBM0418A40QLAB IBM0436A80QLAB IBM0436A40QLAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 Organizations • Registered Addresses, W rite Enables, Synchro­ nous Select, and Data Ins.

1DT7

Abstract: 72125
Contextual Info: INTEGRATED 3ÔE D • 4ÛSS771 ÜQDhBQS 3 ■ IDT _ T - H f e - S S - DEVICE CMOS PARALLEL-TO-SERIAL FIFO IDT721Q5 IDT72115 IDT72125 256 x16, 512x16,1024x 16 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • •

PIC16CE62X

Contextual Info: PIC16CE62X OTP 8-Bit CMOS MCU with EEPROM Data Memory Devices included in this data sheet: Pin Diagrams • PIC16CE623 • PIC16CE624 • PIC16CE625 PDIP, SOIC, Windowed CERDIP Device Program Memory RAM Data Memory EEPROM Data Memory PIC16CE623 512x14 96x8

VRAM

Abstract: Dual-Port V-RAM sam plus SDQ14 sdc1 flash MT42C256
Contextual Info: ADVANCE M T42C 256K 16C 1 2 56K x 16 V R A M |U |IC R O N 256K x 16 DRAM WITH 512x16 SAM FEATURES PIN ASSIGNMENT Top View • Industry-standard pinout, tim ing and functions • High-perform ance, CM OS silicon-gate process • Single +5V ±10% power supply

IBM0418A80QLAB

Abstract: IBM0436A40QLAB IBM0436A80QLAB
Contextual Info: . Preliminary IBM0418A80QLAB IBM0436A80QLAB IBM0418A40QLAB IBM0436A40QLAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 Organizations • 128K x 36 or 256K x 18 Organizations • 0.25 Micron CMOS Technology • Synchronous Flow Thru Mode of Operation with

IBM0418a81qlaa

Contextual Info: . Preliminary IBM0418A81QLAA IBM0436A81QLAA IBM0418A41QLAA IBM0436A41QLAA 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations • Common I/O

se 140

Contextual Info: MOSEL M S 72105 / 72115 256x16 & 512x16 Parailel-to-Serial FIFOs PRELIMINARY FEATURES DESCRIPTION • 2 5n s para lle l p ort a ccess tim e The M S 7 21 0 5 and M S 7 21 1 5 are hig h -sp ee d , low pow e r 16-bit p a ra lle l-to -se ria l FIFO s. T h e se FIFO s a re w ell su ited fo r any

ERF 2030

Abstract: ERF 2030 mos fet c455 CY7C455 CY7C456 CY7C457 CY7C447 c4556 C4557
Contextual Info: / u h *f o . iviu i l u a y , w w i u u t i r p , 1 Revision: Tuesday, December 14,1993 C Y 7C 455 C Y 7C 456 C Y 7C 457 = = ^ C Y PR K SS p r e l im in a r y 512x18, lK x 18, and 2 K x l8 Cascadable Clocked FIFOs with Programmable Flags Features Functional Description

Contextual Info: I = = = = •= P relim inary IBM0418A81 DLAB IBM0418A41 DLAB IBM0436A81DLAB IBM0436A41 DLAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations

512X16 sram

Abstract: SRAM timing static SRAM single port
Contextual Info: d110001 512X16, Mux 8, Drive 3, Non-Pipelined High-Speed Single-Port Synchronous SRAM Features Memory Description • Precise Optimization for Infineon’s C9DD1 0.20µm The 512X16 SRAM is a high-performance, synchronous single-port, 512-word by 16-bit memory designed to

"Video RAM"

Abstract: Video RAM SIO11 AK5216256WV-10 AK5216256WV-12 AK5216256WV-80 512X16 si08 VIDEO module
Contextual Info: ACCUTEK MICROCIR CU IT 3TE D • 01D7ti47 GODDOS"] 3 ■ ACU T-46-23-20 ACCUTEK MICROCIRCUIT AK5216256WV 256Kx 16/512x16 Dual Port Video RAM DESCRIPTION The Accutek AK5216256 is a 4 MEG-bit Dual Port Dynamic Memory Video Module. The module contains a 256K x 16 DRAM

Contextual Info: . Preliminary IBM0418A81ELAB IBM0436A81ELAB IBM0418A41ELAB IBM0436A41ELAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations • Common I/O

IBM0418A41DLAB

Abstract: IBM0418A81DLAB IBM0436A41DLAB IBM0436A81DLAB
Contextual Info: . IBM0418A81DLAB IBM0436A81DLAB IBM0418A41DLAB IBM0436A41DLAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology • Registered Outputs

IBM0418A81QLAA

Abstract: IBM0436A81QLAA
Contextual Info: . IBM0418A81QLAA IBM0436A81QLAA IBM0418A41QLAA IBM0436A41QLAA 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology • Synchronous Pipeline Mode of Operation with

Contextual Info: SN74ACT7803 512x18 CLOCKED FIRST-IN, FIRST-OUT MEMORY S C A S 1 9 1 A -M A R C H 1991 - R EVISED JULY 1995 • Member of the Texas Instruments Wldebus Family • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident • Read and Write Operations Synchronized

DDXXXXX

Contextual Info: PRELIMINARY IDT72V205 IDT72V215 IDT72V225 IDT72V235 IDT72V245 3.3 VOLT CMOS SyncFlFO 256x18, 512x18,1,024x18, 2,048 X 18 and 4,096 x 18 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • 72225LB/72235LB/72245LB, designed to run off a 3.3V sup­

Contextual Info: CMOS SyncBiFlFO 256x18x2 and 512x18x2 IDT72605 IDT72615 Integrated Device Technology, Inc. FEATURES: • Two independent FIFO memories for fully bidirectional data transfers • 256 x 18 x 2 organization IDT 72605 • 5 1 2 x 1 8 x 2 organization (IDT 72615)

Contextual Info: SN74ABT7819 512x18x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCBS125G - JULY 1992 - REVISED JULY 1998 • Member of the Texas Instruments Widebus Family • Microprocessor Interface Control Logic • Programmable Almost-Full/Almost-Empty Flag •

Contextual Info: MI CR ON T E C H N O L O G Y bOE D INC 000^^23 AMT • PIRN ADVANCE MT42C256K16C2 256K X 16 VRAM I^ IK Z R O N VRAM 256K X 16 DRAM WITH 512x16 SAM FEATURES PIN ASSIGNMENT Top View • Industry-standard pinout, timing and functions • High-performance, CMOS silicon-gate process

Contextual Info: = = = = = •= Preliminary IBM 0418A81 E LAB IBM0418A41 ELAB IBM0436A81E LAB IBM0436A41ELAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 256K x 36 or 512K x 18 organizations • Registered Outputs • 128K x 36 or 256K x 18 organizations

IBM0418A41BLAB

Abstract: IBM0418A81BLAB IBM0436A41BLAB IBM0436A81BLAB
Contextual Info: . Preliminary IBM0418A81BLAB IBM0436A81BLAB IBM0418A41BLAB IBM0436A41BLAB 8Mb 256Kx36 & 512x18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology