54F8 Search Results

54F86

Contextual Info: FAST 54F86 Signetics Gate Quad Two-Input Exclusive-OR Gate Prod uct Specification Military Logic Products ORDERING INFORMATION FUNCTION TABLE INPUTS A L L H H L H L H ORDER CODE PACKAGES OUTPUT B Y Ceramic DIP 54F06/BCA L H H L Ceramic Flat Pack 54F86/BDA

M823

Abstract: 54F823DMQB 54F823 54F823FMQB 54F823LMQB AM29823
Contextual Info: & N a ti on al Semiconductor MILITARY DATA SHEET Original Creation Date: Last Update Date: Last Major Revision Date: M N 54F823-X R E V 1A0 05/10/96 07/30/96 05/10/96 9—BIT D-TYPE FLIP-FLOP General Description The F823 is a 9—bit buffered register. It features Clock Enable and Clear which are ideal

Contextual Info: g M ilita ry 5 4 F 8 6 M O TO R O LA Quad 2-In p u t Exclusive OR G a te MP0 mini ELECTRICALLY TESTED PER: MIL-M-38510/34501 LOGIC DIAGRAM Vcc A4 B4 Y4 B3 AVAILABLE AS: 1) JAN: JM38510/34501BXA 2) SMD: N/A 3)883: 54F86/BXAJC X = CASE OUTLINE AS FOLLOWS:

54F803

Abstract: F803
Contextual Info: MOTOROLA M ilita ry 54F803 Advance Information C lo ck D riv e r Q uad D-Type Flip-Flop W ith M atc h e d P ro p ag atio n Delays M PO t t / f lll ELECTRICALLY TESTED PER: 54F803 AVAILABLE AS: 1 JAN: * 2) SMD: * 3} 683C: * The 54F803 is a high-speed, low-power, quad D-type flip-flop featur­

Contextual Info: g Military 54F86 MOTOROLA Quad 2-Input Exclusive OR Gate MP0 mini ELECTRICALLY TESTED PER: MIL-M-38510/34501 LOGIC DIAGRAM vcc [ïïl fis] A4 Y4 B3 A3 Y3 |¥| [Til [ìcT] ITI 171 AVAILABLE AS: 1) JAN: JM38510/34501BXA 2) SMD: N/A 3)883: 54F86/BXAJC X = CASE OUTLINE AS FOLLOWS:

Contextual Info: MOTOROLA Advance Information 4 -B it C o m p a ra to r ELECTRICALLY TESTED PER: 54F85 The 54F85 is a 4-B it M a gn itu d e C om p a ra to r w h ich com pares tw o 4-bit w o rd s A, B , each w o rd having fo u r Parallel Inputs (A 0 - A 3 ); {B 0 - B 3 ),

Contextual Info: 54F825,74F825 54F825 74F825 8-Bit D-Type Flip-Flop Literature Number: SNOS217A 54F 74F825 8-Bit D-Type Flip-Flop General Description Features The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing

Contextual Info: 54F821,74F821 54F821 74F821 10-Bit D-Type Flip-Flop Literature Number: SNOS215A 54F 74F821 10-Bit D-Type Flip-Flop General Description Features The ’F821 is a 10-bit D-type flip-flop with TRI-STATE true outputs arranged in a broadside pinout The ’F821 is functionally and pin compatible with the AMD’s Am29821

54F825

Abstract: 54F825DMQB 54F825FMQB 54F825LMQB M825
Contextual Info: & N a ti on al Semiconductor MILITARY DATA SHEET O r i g i n a l C r e a t i o n Date: Last U p d a t e Date: Last M a j o r R e v i s i o n Date: M N 54F825-X R E V 1A0 0 5 / 10/96 0 7 / 30/96 0 5 / 10/96 8—BIT D-TYPE FLIP-FLOP General Description The F 8 2 5 is an 8— b i t b u f f e r e d r e g i s t er.

54F86DM

Abstract: 54F86FM 54F86LM 74F86 74F86PC 74F86SC 74F86SJ J14A M14A N14A
Contextual Info: 54F 74F86 2-Input Exclusive-OR Gate General Description This device contains four independent gates each of which performs the logic exclusive-OR function Commercial Military 74F86PC Package Number N14A 54F86DM Note 2 Package Description 14-Lead (0 300 Wide) Molded Dual-in-Line

Contextual Info: M ilita ry 5 4 F 8 6 MOTOROLA Quad 2-In p u t E xclusive OR G ate MPO mini ELECTRICALLY TESTED PER: MIL-M-38510/34501 LOGIC DIAGRAM vcc A4 Y4 B3 A3 Y3 AVAILABLE AS: 1 JAN: JM38510/34501BXA 2) SMD: N/A 3) 883: 54F86/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

Contextual Info: 54F86, SN74F86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SDFS019B - JANUARY 1989 - REVISED JANUARY 1997 r * Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs SN 54F86 . . . J PACKAGE

74F827

Contextual Info: 54F827,74F827,74F828 54F827 74F827 74F828 10-Bit Buffers/Line Drivers Literature Number: SNOS218A 54F 74F827  74F828 10-Bit Buffers Line Drivers General Description Features The ’F827 and ’F828 10-bit bus buffers provide high performance bus interface buffering for wide data address

ti 261

Abstract: 1/vme 9470
Contextual Info: 54F86 54F86 2-Input Exclusive-OR Gate Literature Number: SNOS219A 54F 74F86 2-Input Exclusive-OR Gate General Description This device contains four independent gates each of which performs the logic exclusive-OR function Commercial Package Number Military

Contextual Info: National Semiconductor 54F/74F86 2-Input Exclusive-OR Gate General Description This device contains four independent gates, each of which performs the logic exclusive-OR function. Ordering Code: See Section 11 Package Number Military Commercial 74F86PC 54F86DM Note 2

1G51

Contextual Info: December 1994 54F/74F86 2-Input Exclusive-OR Gate General Description This device contains four independent gates, each o f which performs the logic exclusive-OR function. Military Package Number N14A 14-Lead 0.300" Wide Molded Dual-in-Line 54F86DM (Note 2)

54F85

Abstract: SIGNETICS 25120 f85 bp
Contextual Info: Signetics FAST 54F85 Com parator 4-Bit Magnitude Comparator Prelim inary Specification Military Logic Products FEATURES ORDERING INFORMATION • H ig h -im p e d a n c e NPN b a s e inputs fo r re d u c e d lo a d in g 2 0 ^ A in H IG H a n d L O W s ta te s

Contextual Info: M O TO RO LA M ilitary 54F86 Q u a d 2-Inpu t E x c lu siv e O R G ate ELECTRICALLY TESTED PER: MIL-M-38510/34501 LOGIC DIAGRAM R pn m w m m h VCC 64 A4 Y4 B3 A3 AVA ILA BLE A S: Y3 1 JAN : JM38510/34501BX A 2) S M D : * 3) 883C: 54F86/BXAJC X = C A S E OU TLIN E A S FO LLOW S:

AM248

Abstract: 54F825FM 54F825LM 54F825SDM 74F825 74F825SC 74F825SPC J24F M24B N24C
Contextual Info: 54F 74F825 8-Bit D-Type Flip-Flop General Description Features The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems Also included in the ’F825 are multiple enables that allow multiuser control of the interface

Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 04/15/97 Last Update Date: 07/08/97 Last Major Revision Date: 04/15/97 54F821-X REV 0A0 10-BIT D-TYPE FLIP-FLOP General Description The 'F821 is a 10-bit D-type flip-flop with Tri-State true outputs arranged in a broadside

M38510 10102BCA

Abstract: SCX6206 marking code E5 SMD ic jm38510/10101bga SCX6B48AIS SNJ54LS165J JM38510/30004bca JM38510/10102BCA JM38510/10102BIA 946DMQB
Contextual Info: N ENHANCED SOLUTIONS DESIGN/PROCESS CHANGE NOTIFICATION formerly Military & Aerospace Division PCN Nr: 2000 Listing GIDEP Nr: GIDEP Category: Issued: 01/24/2000 TRB Nr: Product ID (Description): Proposed Date of Change: Description of Change: Effect of Change:

Motorola transistor smd marking codes

Abstract: 7900801CA lm6482a 5962-8993001MIA replacement for 11c90 TRANSISTOR SMD MARKING CODE QA LM311 SMD JM38510/10305BEA LM714h Motorola semiconductor smd marking codes
Contextual Info: N MILITARY / AEROSPACE DESIGN/PROCESS CHANGE NOTIFICATION PCN Nr: 1998 Listing GIDEP Nr: GIDEP Category: Issued: 01/06/98 TRB Nr: This is to advise you that a Design and/or Process Change will be made to the following MIL/AERO product s : Product ID (Description):

Mil JAN jm38510 Cross Reference

Abstract: JM38510 5962-8997001PC 5962-87572 5962-8991101XC DS16F95QMLV 75202 jm3851030402bca 5962-9203001MPC 7900801CA
Contextual Info: NATIONAL SEMICONDUCTOR STANDARD MICROCIRCUIT DRAWING CROSS REFERENCE NATIONAL SEMICONDUCTOR STANDARD MICROCIRCUIT DRAWING CROSS REFERENCE 1/16/98 Part Numbering Guides Jan Product: JM38510 / 119 05 B P A MIL-M-38510 Basic Specification Lead Finish A = Solder, C = Gold

triac zd 607

Abstract: 1n5204 CA2820 TRW 2N4427 equivalent bfr91 2N6823 842 317 SO8 BD243 PINOUT BD529 bf506 BF845
Contextual Info: MASTER SELECTION GUIDE EUROPEAN SUPPLEMENT This is the European supplement to the USA edition of the Master Selection Guide, SG73/D REV 3. It should be read along with the USA edition. The supplement carries amendments to sections 1 and 5 in the USA edition.