625MBPS Search Results
625MBPS Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
GPON block diagram
Abstract: OC-24 SY87725L SY87725LHY SY87725LHYTR
|
Original |
SY87725L SY87725L 52MHz 76MHz. M9999-071007-B GPON block diagram OC-24 SY87725LHY SY87725LHYTR | |
Contextual Info: 2002 年 4 月 フ ジ ク ラ 技 報 第 102 号 新 製 品 紹 介 光ファイバブロードバンドネットワーク用 E−PONシステム これからの高速ブロードバンドネットワーク時 ④独自の技術により,各加入者に対し帯域保証 |
Original |
100Mbpsã 625Mbps | |
hard disk SATA pcb schematic
Abstract: MAX4951B ibis sata MAX4889B MAX4820 MAX4885 MAX4888 MAX4889 MAX4890 MAX4950
|
Original |
MAX4820, MAX4951, MAX4950, MAX4888, MAX4889, MAX4885, MAX4890, MAX4895, MAX4989, MAX4950 hard disk SATA pcb schematic MAX4951B ibis sata MAX4889B MAX4820 MAX4885 MAX4888 MAX4889 MAX4890 | |
CLC005
Abstract: CLC012 CLC012AJE CLC016 M14A SD012EVK
|
Original |
CLC012 270Mbps 180psPP 290mW 50Mbps 650Mbps CLC005 CLC012 CLC012AJE CLC016 M14A SD012EVK | |
1N4148
Abstract: 400M CLC006 CLC014 CLC016 vc servo controller fine slow "Comlinear CLC014"
|
Original |
CLC014 540Mbps CLC014 1N4148 400M CLC006 CLC016 vc servo controller fine slow "Comlinear CLC014" | |
Contextual Info: SY87725L 2.5Gbps GPON/BPON ONU SERDES General Description Features The SY87725L is a single chip transceiver for data rates up to 2.5Gbps. On the receive side, it includes a complete clock recovery and data retiming circuit with an integrated 4-bit serial-to-parallel data converter. On |
Original |
SY87725L SY87725L 52MHz 76MHz. M9999-071007-B | |
mobile phone controlled street light monitoring and control system
Abstract: MICRF112 MICRF211ABQS mp3 microprocessor for garage door MIC5318 garage door 300mhz transmitter circuits diagram MIC2810 MIC3289 MIC68400 SY58611U
|
Original |
SE-171 M0051-042007 mobile phone controlled street light monitoring and control system MICRF112 MICRF211ABQS mp3 microprocessor for garage door MIC5318 garage door 300mhz transmitter circuits diagram MIC2810 MIC3289 MIC68400 SY58611U | |
OC-24
Abstract: SY87725L SY87725LHY SY87725LHYTR
|
Original |
SY87725L SY87725L 52MHz 76MHz. M9999-021607-A OC-24 SY87725LHY SY87725LHYTR | |
mdte
Abstract: 1206 capacitor chip pads layout 1N4148 400M CLC014 dps 350 power supply schematic
|
OCR Scan |
CLC014 540Mbps CLC014 CLC730063 mdte 1206 capacitor chip pads layout 1N4148 400M dps 350 power supply schematic | |
hard disk SATA pcb schematic
Abstract: MAX4820 altium max4820 MAX4885 MAX4888 MAX4889 MAX4889B MAX4890 MAX4950 MAX4951
|
Original |
MAX4820, MAX4951, MAX4950, MAX4888, MAX4889, MAX4885, MAX4890, MAX4895, MAX4989, MAX4950 hard disk SATA pcb schematic MAX4820 altium max4820 MAX4885 MAX4888 MAX4889 MAX4889B MAX4890 MAX4951 | |
Contextual Info: SY87725L Product Brief 2.5Gbps GPON/BPON ONU SERDES Description The transmit synthesizer uses the CLKIN parallel data clock to generate its own serial rate clock locked to CLKIN. This enables the transmit and receive to operate at different data rates. The serial interface for both the transmit and receive |
Original |
SY87725L eac8-9599 SE-171 M9999-030807 | |
T3D DIODE
Abstract: noise meters block diagram 1J0F dps 350 power supply schematic 1n414b dt t3d 13 T3D 64 UTP cat 6 cable data sheet 400M CLC014
|
OCR Scan |
CLC014 540Mbps CLC014 exte0-180-530 DDD3433 T3D DIODE noise meters block diagram 1J0F dps 350 power supply schematic 1n414b dt t3d 13 T3D 64 UTP cat 6 cable data sheet 400M | |
Contextual Info: ß Adaptive Cable Equalizer for High-Speed Data Recovery National Semiconductor Comlinear CLC014 APPLICATIONS: • SMPTE 259M serial digital interfaces: NTSC/PAL, 4:2:2 component and wide screen; also 540Mbps (4:4:4:4 • Serial digital video routing and distribution |
OCR Scan |
CLC014 540Mbps CLC014 | |
GPON block diagram
Abstract: OC-24 SY87725L SY87725LHY SY87725LHYTR
|
Original |
SY87725L SY87725L 52MHz 76MHz. M9999-071007-B GPON block diagram OC-24 SY87725LHY SY87725LHYTR | |
|
|||
utp cable coaxial
Abstract: SMPTE-259 CLC014 M14A CLC006 equalizer soic 14 311-MbPS 400M CLC014AJE
|
Original |
SMPTE259 540Mbps CLC014 200mBelden8281 270Mbps 180pspp 290mW 50Mbps 650Mbps utp cable coaxial SMPTE-259 CLC014 M14A CLC006 equalizer soic 14 311-MbPS 400M CLC014AJE | |
AN3131Contextual Info: Implementing Clock Switchover in Stratix & Stratix GX Devices January 2004, 1.0 Application Note Introduction The clock switchover feature allows the PLL to switch between two reference input clocks. Designers can use this feature for clock redundancy or for a dual clock domain application such as in a system |
Original |