6561 IC Search Results

779157-01

Abstract: SHB12X-B12X 192344-01 PXI-6561 SMA-2164 PXI-6562 779323-01 77915701 0/Optical 12x DDR Infiniband 6562
Contextual Info: 400 and 200 Mb/s LVDS Digital Waveform Generator/Analyzers NEW NI PXI-6562, NI PXI-6561 • 400 Mb/s PXI-6562 or 200 Mb/s (PXI-6561) maximum data rate in double data rate (DDR) mode • 200 MHz (PXI-6562) or 100 MHz (PXI-6561) maximum clock rate • LVDS signaling for fast clock rates

Contextual Info: HM-6561 Semiconductor 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby. 50^W Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous cir­

HM1-6561

Abstract: 6561/883
Contextual Info: HM-6561/883 S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated

HM1-6561

Contextual Info: HM-6561/883 256 x 4 CMOS RAM March 1997 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous

6561

Abstract: 6561 IC
Contextual Info: HM-6561 HARRIS S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby. 50|iW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous cir­

6561

Abstract: HM1-6561-9 6561-9 HM-6561-9 HM1-6561 HM1-6561B-9 HM-6561 HM-6561B-9 L 6561 32 x 32 matrix
Contextual Info: HM-6561 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation.

Contextual Info: HM-6561/883 Semiconductor 256 x 4 CMOS RAM March 1997 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous

6561B

Abstract: Intersil 6561/883 6561
Contextual Info: HM-6561/883 TM 256 x 4 CMOS RAM March 1997 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit

6561

Abstract: HM1-6561-9 HM1-6561B-9 HM-6561 HM-6561-9 HM-6561B-9 HM165619
Contextual Info: HM-6561 TM 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby. . . . . . . . . . . . . . . . . . . . 50µW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation.

HM3-6561-9

Abstract: HM3-6561B-9 hm1-6561b/883
Contextual Info: f f t H A R R HM-6561 I S S E M I C O N D U C T O R 256 X 4 CMOS RAM February 1992 Features Description • Low Power Standby. 50|iW Max. The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design

Contextual Info: HM-6561/883 HARRIS S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated

Contextual Info: cm H A R R HM-6561/883 IS S E M I C O N D U C T O R 256 x 4 CMOS RAM February 1992 Features Description • This Circuit is Processed in Accordance to Mil-Std883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated

HM1-6561-9

Abstract: HM1-6561B-9 HM-6561-9 HM-6561 HM-6561B-9 hM1-6561
Contextual Info: HM-6561 S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation.

MPS6560

Abstract: MPS6563 MPS6562 MPS6565 TA425 MPS 6561 MPS-6565
Contextual Info: MPS 6561 • MPS 6563 COMPLEMENTARY SILICON AP MEDIUM POWER TRANSISTORS CASE T0-92A THE MPS656O, MPS656I NFN AND MPS6562, MPS6563 (PNP) ARE SILICON PLANAR EPITAXIAL TRANSISTORS DESIGNED FOR COMPLEMENTARY SYMMETRY AUDIO OUTPUT APPLICATIONS. THEY FEATURE LOW COLLECTOR TO

MPS6563

Contextual Info: MPS 6560 • MPS 6562 MPS 6561 - MPS 6563 COMPLEMENTARY SILICON AF MEDIUM POWER TRANSISTORS CASE T0-92A THE MPS656 O, MPS 656 I NFN AND MPS6562 , MPS6563 (PNP) ARE SILICON PLANAR EPITAXIAL TRANSISTORS DESIGNED FOR COMPLEMENTARY SYMMETRY AUDIO OUTPUT APPLICATIONS. THEY FEATURE LOW COLLECTOR TO

MPS6562

Abstract: MPS6563 MPS6560 MPS6565 TA425 T0-92A
Contextual Info: *V MPS 6560 - MPS 6562 M PS 6561 - MPS 6563 COMPLEMENTARY SILICON AF MEDIUM POWER TRANSISTORS CASE T0-92A THE MPS6560, MPS656I NFN AND MPS6562, MPS6563 (PNP) ARE SILICON PLANAR EPITAXIAL TRANSISTORS DESIGNED FOR COMPLEMENTARY SYMMETRY AUDIO OUTPUT APPLICATIONS. THEY FEATURE LOW COLLECTOR TO

TEA 5560

Abstract: TA5561 5561 5560 C15-1 L 6561 318s 67376-2
Contextual Info: 64-Bit 16 x 4 Random Access M em ory 5560/ 6560, 5561/6561 Features/B enefits • • • • • • Selection Gui Advanced Schottky processing. Low input current (250 /xA m axim um ). Data outputs are off during a write cycle. Fully decoded and TTL compatible.

ax3003

Contextual Info: HM -6561 23 HARRIS 256 x 4 CMOS RAM Features • • • • • • • • • • • • Pinout HM-6100 Com patible Low Standby P o w e Max. Low Operating P o w e r. 20mW/MHz Max.

HM-6561-5

Contextual Info: Specifications HM-6561-5 ABSOLUTE M A XIM U M RATINGS OPERATING RANGE Supply Voltage - VCC - G N D -0 .3 V to +8.0V A pplied In p u t or O u tp u t Voltage (G N D -0 .3 V ) to (VCC + 0.3V ) -650C t o +1500C Storage Temperature Operating Supply V oltage -V C C

b09 n03

Abstract: RTU A08 b04 n03 A09 N03 RTU A01 1553 bus controller b04 n06 a13 trans a06 n03
Contextual Info: 000 BUS-65612 ILC DATA DEVICE CORPORATION«_ _ MIL-STD-1553 BUS CONTROLLER REMOTE TERMINAL CONTACTFACTORY AND BUS MONITOR FOR MORE INFORMATION FEATURES DESCRIPTION The B U S -6561 2isa 16M H z single chip dual re dund ant M IL-S TD -1553 Bus Controller BC , Remote Terminal Unit

6562

Abstract: HM-6562 HM-6641 HWI-6562 HM-6611 HM-6561 HM-6661 6562 s harris 6562
Contextual Info: HARRIS HM-6562 SEM ICO NDUCTOR P R O D U C T S DIVISI ON A DIVISION OF HARRIS CORPORATION 256 <4 C M O S R A M NOT RECOMMENDED FOR NEW DESIGNS SEE HM-6561 Pinout Features LOW POWER STANDBY LOW POWER OPERATION FAST ACCESS TIME D A T A R ETENTIO N VOLTAG E T T L COMPATIBLE IN /O U T

HM3-6561-9

Abstract: HM3-6561 6561B-9 HM1-6561883 hm-6561 HM36561B-9 HM3-65619 6561-9
Contextual Info: ÎH H A J R R IS U S E M I C O N D U C T O R U HM-6561 256 February 1992 Features • X 4 CMOS RAM Description Low Power Standby. 50pWMax. • Low Power O peration.20mW/MHz Max. • Fast Access Time. 200ns Max.

ic 358s

Abstract: 358s ic+358s 1358S I358S
Contextual Info: ANI 358 AN6562 ANI 358S (AN6562S) .AN6561 OPERATIONAL AMPLIFIERS AN1 358 (AN6562), AN1 358S (AN6562S) ,AN6561 Dual Operational Amplifiers • Outline T h e A N 1358 (A N 6562), the A N 1358S (A N 6562S) and the AN 6561 are dual operational am p lifiers w ith phase com p en sa­

Contextual Info: 33 HM-6561/883 256 February 1992 4 CMOS RAM Description Features • X T h e H M -65 6 1 /8 83 is a 2 5 6 x 4 static C M O S RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high per­