70841B Search Results

S3040

Abstract: DIP SWITCH EDGE 100PF 10UF 1N4001 EV3040 1n4001 melf 0955-0731
Contextual Info: OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD EV3040 EV3040 DESCRIPTION ELECTRICAL CONNECTIONS The S3040 evaluation board provides a flexible platform for verifying the operation of AMCC OC-48 clock recovery units. This document provides information on the board contents and layout. It should

PMC-2060488

Abstract: 9246 260am PMC-2060487 HDMP-1032AG
Contextual Info: Notice – PMC Product Support Scope for Specified HDMP Part Numbers AM November 21, 2006 12 :2 7: 52 Notice – PMC Product Support Scope for Specified HDMP Part Numbers 07 Distribution: 20 This notice has been added to the front of the datasheets for the “Devices Affected” listed below.

HDMP-T1636AG

Abstract: PMC-2060487 HDMP-1636AG PMC-2060488 HDMP-1646AG
Contextual Info: Notice – PMC Product Support Scope for Specified HDMP Part Numbers AM November 21, 2006 12 :2 6: 09 Notice – PMC Product Support Scope for Specified HDMP Part Numbers 07 Distribution: 20 This notice has been added to the front of the datasheets for the “Devices Affected” listed below.

T1636

Abstract: HDMP-1636A HDMP-1646A HDMP-T1636A E1 to fiber optic converter circuit 1646a
Contextual Info: Gigabit Ethernet and Fibre Channel SerDes ICs Technical Data HDMP-1636A Transceiver HDMP-1646A Transceiver HDMP-T1636A Transceiver Features Description • IEEE 802.3z Gigabit Ethernet Compatible • ANSI x3.230-1994 Fibre Channel Compatible FC-O • Supports Serial Data Rates of

0422

Abstract: cdr 650 HDMP-0422 HDMP-1636A MO-150
Contextual Info: Agilent HDMP-0422 Single Port Bypass Circuit with CDR & Data Valid Detection Capability for Fibre Channel Arbitrated Loops Data Sheet Description The HDMP-0422 is a Single Port Bypass Circuit PBC with Clock and Data Recovery (CDR) capability included. This integrated

SLLA064

Abstract: CAT5 cable 784D HFS9003 SN65LVDS31 SN65LVDS32
Contextual Info: Application Report SLLA064 - January 2000 Measuring Crosstalk in LVDS Systems Elliott D. Cole, P.E. Data Transmission Applications ABSTRACT Crosstalk has been around since the early days of analog telephony, and is still very much a concern in high-speed digital communication systems. Terms such as near-end crosstalk

Contextual Info: Agilent HDMP-2689 Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes Data Sheet • Source synchronous single data rate clocking of transmit parallel data for 1.0625 GBd serial rate • MII management interface for chip control and status Description

X3-230-1994

Contextual Info: HDMP-1685A 1.25 Gbps Four Channel SerDes with 5-Pin DDR SSTL_2 Parallel Interface Data Sheet Functional Description This data sheet describes HDMP-1685A, a 1.25 Gbps, four-channel, 5-pin per channel parallel interface SERDES device. The HDMP-1685A 5-pin parallel

93459 1515

Abstract: a9hv 2488-32 prbs generator using ic chips ber HP71501C onspec MC27256-17/CQ-2231
Contextual Info: in conjunction with SONET/SDH OC-48 Transceiver Reference Design Application Note 1172 HP - HFCT-5402D AMCC - S3041 and S3042 Evaluation Board Overview This document describes the operation and usage of the AMCC S3041/S3042 Evaluation Board with the HP HFCT-5402D Single

Contextual Info: Gigabit Ethernet SerDes IC Technical Data HDMP-T1636A Transceiver HDMP-1636A Transceiver HDMP-1646A Transceiver Features • IEEE 802.3z Gbit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification” • Better Setup Time than

0.1 microfarad capacitor

Abstract: HARD DISK power supply diagram 0421s hard disk CIRCUIT diagram HDMP-04XX HDMP-0421 HDMP-1536A hard drive circuit diagram HARD DISK with power supply diagram
Contextual Info: Port Bypass Circuits for Fibre Channel Arbitrated Loop Standard and its Extensions Technical Data HDMP-0421 Single PBC & CDR Features Description • Supports ANSI X3T11 1.0625 Gbps FC-AL Loop Configuration • Supports 802.3z 1.25 Gbps Gigabit Ethernet GE Rates

Contextual Info: Agilent 71501D Jitter Analysis System Product Overview A flexible, wide bandwidth jitter analysis system analyzer1, SDH/SONET standard tests for jitter transfer, jitter tolerance, and jitter generation/output can be performed at STM-4/OC-12 622 Mb/s , STM-16/OC-48

Contextual Info: HDMP-0552 Quad Port Bypass Circuit with CDR and Data Valid Detection For Fibre Channel Arbitrated Loops Data Sheet Features Description Applications A PBC consists of multiple 2:1 multiplexers daisy chained along with a CDR. Each port has two modes of operation: “disk in loop” and “disk bypassed.” When the “disk

HFCT-5942L

Abstract: 3771 HFCT-5942 HFCT-5942AL HFCT-5942ATL HFCT-5942TL LM285 STM-16 TLV2252AID long range gold detector circuit diagram
Contextual Info: HFCT-594x Single Mode Laser Small Form Factor Transceivers for ATM, SONET OC-48/SDH STM-16 Application Note 1232 Introduction This document details the recommended circuit connections for Avago single mode LC Small Form Factor SFF OC-48 SONET/SDH transceivers.

sma-142-0701-801

Abstract: kemet c0805c 11667A HSMG-C650 avago technologies SMA 142-0701-201 83487A MCR10FX1001 HDMP-163K PRBS AVAGO nin-fa1r0k
Contextual Info: HFBR-0535 Gigabit/s Ethernet 1.25 GBd 1x9 Fiber-Optic Transceiver Evaluation Board Application Note 1218 HFBR-0535 Evaluation Board The purpose of the HFBR-0535 1.25 GBd evaluation board is to provide the designer with a convenient means to test the 1-row-by-9-pins (1x9) multi-mode

HP70004A

Abstract: HP53132A OV 5642 70874B
Contextual Info: * SONET/SDH/ATM OC-3 CLOCK RECOVERING TRANSCEIVER SYNERGY SEM IC O N D UC TO R FEATURES DESCRIPTION • A complete SONET/SDH Transmitter & Receiver ■ Complies with Bellcore, CCITT and ANSI Specifications ■ Two on-chip PLLs: One for clock generation & another for clock recovery

2.45 GHz single chip transmitter

Abstract: serdes transceiver 1999 ps-1250 f1
Contextual Info: Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs HDMP-1637A SerDes Features • IEEE 802.3z Gigabit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification” • Low Power Consumption • 10 mm 64-pin PQFP Package

JESD-89

Contextual Info: PM 10 :0 9: Data Sheet 26 Agilent HDMP-1685A 1.25 Gbps Four Channel SerDes with 5-pin DDR SSTL_2 Parallel Interface nd ay ,1 3M ar ch ,2 00 6 Features • 5-bit wide Tx, Rx bus pairs • 208-ball, 23 mm TBGA package • Parallel data I/O and clocks compatible with SSTL_2

HDMP-1536A

Abstract: HDMP-1546A
Contextual Info: Fibre Channel Transceiver Chip Technical Data HDMP-1536A Transceiver HDMP-1546A Transceiver Features • ANSI X3.230-1994 Fibre Channel Compatible FC-0 • Supports Full Speed (1062.5 MBd) Fibre Channel • Compatible with “Fibre Channel 10-Bit Interface”

D 2689

Abstract: n05 marking code A03 AGILENT marking h06 HDMP-2689 HFBR-5720L
Contextual Info: Agilent HDMP-2689 Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes Data Sheet • Source synchronous single data rate clocking of transmit parallel data for 1.0625 GBd serial rate • MII management interface for chip control and status Description

1MHz function generator

Abstract: 8449B 5911 DATA SHEET OF 8449B HFCT-5911ATL HFCT-59L1ATL RC31 HDMP-1687 HFBR-5911L HFBR-59L1AL
Contextual Info: HFBR-5911L/AL, HFBR-59L1AL HFCT5911ATL and HFCT-59L1ATL LC Small Form Factor Transceivers and HDMP1687 1.0625 /1.25 Gb/s Quad SerDes Reference Design Application Note 1287 Reference Board Introduction The purpose of the 1.0625/1.25 Gb/s Quad SerDes/Small Form Factor SFF transceiver reference board is to

aag2

Abstract: T03 T04 T02 T05 tdc8 AAG2 marking
Contextual Info: Agilent HDMP-2689 Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes Data Sheet • Source synchronous single data rate clocking of transmit parallel data for 1.0625 GBd serial rate • MII management interface for chip control and status Description

rx1 1240

Abstract: 50/sun hold rx1 1240
Contextual Info: Agilent HDMP-1687 Four Channel SerDes Circuit for Gigabit Ethernet Data Sheet Functional Description The HDMP-1687 is a four channel SERDES device. HDMP-1687 is in a 208-ball TBGA package with four 1.25 Gbps serial I/O. This integrated circuit provides a low-cost,

rx1 1240

Abstract: transmitter 315 Mhz TX33 A09 N03
Contextual Info: Agilent HDMP-1685A 1.25 Gbps Four Channel SerDes with 5-pin DDR SSTL_2 Parallel Interface Data Sheet Functional Description This data sheet describes HDMP1685A, a 1.25 Gbps, four-channel, 5-pin per channel parallel interface SERDES device. The HDMP-1685A 5-pin parallel interface device enables a single ASIC to drive twice as