7400 DATASHEET TTL GATE Search Results

70L95

Abstract: 80L95 VC555 DM54365 DM54366 DM54367 DM54368 70L96 80L97
Contextual Info: ^ 2 Additional Devices D M 70/D M 8095, L95, 96, L96, 97, L97, 98, L98 TRI-STATE Hex Buffers www .Datasheet. i n General Description These devices provide six, two-input buffers in each pack­ age. Both the standard 7400 com patible TTL technology, and the “ true tenth-pow er" (74L com patible) low power ver­

schematic diagram cga to vga

Abstract: TTL 7400 TTL 7400 full
Contextual Info: PLS2 V A A+PLUS PROGRAMMABLE LOGIC USER SOFTWARE DI Q O I L Ù L FEATURES GENERAL DESCRIPTION • Software support for all Altera General-Purpose EP-Series EPLDs. A+PLUS, Altera Programmable logic user software, contained in the PLS2 product, is a series of software

Contextual Info: SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SDAS187A – APRIL 1982 – REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Contextual Info: GOULD 4055916 GOUL D IN C / GOULD A M I SEMI CONDUCTOR 03 DIV D • 03E MDSSTlb 1 1494 DQ114TM 0^ TABLE OF CONTENTS SECTION 1: DESIGN INFORMATION 1.1 CHOOSING AN ARRAY. 1-5 1.1.1 Determining Gate Count. 1-6

7400A

Abstract: B8-11
Contextual Info: - PRELIMINARY - March 1995 Edition 3.0 FUJITSU PRODUCT PROFILE SHEET M B 8 1 1 7 4 0 0 A -50/-60/-70 CMOS 4M x 4 BIT FAST PAGE MODE DYNAMIC RAM CMO S 4,194,304 x 4 BIT Fast Page Mode Dynamic RAM The Fujitsu MB8117400A is a fully decoded CM OS Dynamic RAM DRAM that contains

SN54LS00J

Abstract: JM38510/30001BCA snj54ls00j 30001bca 74LS00 gate diagram nand sn7400
Contextual Info: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

msl 9350

Abstract: TTL SN7400N SN7400N SN7400P 7400 functional cross-reference TEXAS INSTRUMENTS SN7400N ttl nand gate 7400 quad
Contextual Info: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

LCA200K

Abstract: 130 nm CMOS standard cell library 10-JK LEA100K CLDCC LEA200K
Contextual Info: 5304Û04 ÜD m STl 3bb • LLC LSI LOGIC LEA200K Embedded Array Series Description The LEA200K Embedded Array Series is a submicron HCMOS ASIC product which com­ bines the integration and performance bene­ fits of Cell-Based ASICs with the fast turnaround time of Array-Based ASICs. The

EPM5032

Abstract: program EPM5032 ple3-12a PLS-MAX PLDS-MAX altera LP4 74HC
Contextual Info: 32 MACROCELL h igh d e n s it y m ax e p ld P P M c r m u u u c FEATURES G EN E R A L D E SC R IP T IO N • Erasable, User-Configurable, High-Density replacement for TTL and 74HC logic. • Advanced 0.8 micron CMOS EPROM technology. • High speed tpd = 20ns and 83MHz clock

LCA100K

Abstract: LSI LOGIC LCA100K
Contextual Info: »• * LSI LOGIC * LCA100K Compacted Array Plus Series Description The LCA100K Compacted A rray Plus Series is an HCMOS Array-Based ASIC ApplicationSpecific Integrated Circuit product offering extremely high performance. The LCA100K Series is manufactured using 1.0-micron

10 band graphic equalizer LM835

Abstract: lm835 FSA2619 FSA2619P LMC35 lmc835 National Semiconductor AN-140 FSA-2619P TTL 7400 national semiconductor INTEL I7 microprocessor circuit diagram
Contextual Info: National Semiconductor Application Note 791 Charlie Mitchell October 1991 INTENT This note describes the implementation and use of a standard memory element in the realization of state machine control for the purpose of generating serial data The applications shown here employ serial data streams to control

LSI CMOS GATE ARRAY

Abstract: LEA100066 LEA100K LSI LOGIC LEA100K rs flip-flop IC 7400 24008a
Contextual Info: LSI LOGIC LEA100K Embedded Array Series Description The LEA100K Embedded Array Series is an HCMOS ASIC Application-Specific Integrated Circuit product which combines the integra­ tion and performance benefits of Cell-Based ASICs with the fast turnaround time of ArrayBased ASICs. The LEA100K series is manufac­

4x4 barrel shifter with flipflop

Abstract: LEA100K LCA100K ta 8259 LEA100006 LEA100008 LSI LOGIC LEA100K 82385 B282 24008A
Contextual Info: LSI LOGIC LEA100K Embedded Array Series Description The LEA100K Embedded A rray Series is an HCMOS ASIC A pplication-S pecific Integrated Circuit product w hich combines the integra­ tion and perform ance benefits of Cell-Based ASICs w ith the fa st turnaround tim e of A rrayBased ASICs. The LEA100K series is m anufac­

LCA200K

Abstract: re 497.1 82385 sim 300 v 703 LCB007
Contextual Info: LSI LOGIC NOV 19 1992 LEA200K Embedded Array Series Description The LEA200K Embedded Array Series is a submicron HCMOS ASIC product w hich com ­ bines the integration and performance bene­ fits of Cell-Based ASICs w ith the fast turnaround time of Array-Based ASICs. The

zo 107

Abstract: Fujikura coax 2V F100K ECL Users Handbook F100K ECL book alcoa fujikura multi BY300-600 TTL 7400 catalog CY7B923 FR4 substrate with dielectric constant 4.4 for mi op amp cookbook
Contextual Info: HOTLinkt Design Considerations Application Note Overview The HOTLink t family of data communications products provides a simple and lowĆcost solution to highĆspeed data transmission. While these products are easy to use, the methods used to connect them

STM32F050

Abstract: RM0091 stm32f20 STM32F0 STM32F2 STM32F207 3AL 238 ST RM0091 STM32F050C4 rs485 stm32
Contextual Info: STM32F050x4 STM32F050x6 Low- and medium-density advanced ARM -based 32-bit MCU with up to 32 Kbytes Flash, timers, ADC and comm. interfaces Datasheet − production data Features • Core: ARM 32-bit Cortex™-M0 CPU, frequency up to 48 MHz ■ Memories

STM32F050F

Abstract: STM32F050 TIM16 RM0091 STM32F050F4 STM32 IWDG rs485 stm32 stm32f050g ST RM0091 STM32F050C6
Contextual Info: STM32F050x4 STM32F050x6 Low- and medium-density advanced ARM -based 32-bit MCU with up to 32 Kbytes Flash, timers, ADC and comm. interfaces Datasheet − production data Features • Core: ARM 32-bit Cortex™-M0 CPU, frequency up to 48 MHz ■ Memories

Contextual Info: STM32F030x4 STM32F030x6 STM32F030x8 Value-line ARM-based 32-bit MCU with 16 to 64-KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation Datasheet target specification Features • Core: ARM 32-bit Cortex -M0 CPU, frequency up to 48 MHz

PTH08T240W

Abstract: PTH08T241W TMS320 SLTS264J
Contextual Info: PTH08T240W, PTH08T241W www.ti.com . SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER

Contextual Info: PTH08T240W, PTH08T241W www.ti.com . SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER

Contextual Info: PTH08T240W, PTH08T241W www.ti.com . SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER

Contextual Info: PTH08T240W, PTH08T241W www.ti.com . SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER

T530X337M006ASE015

Abstract: PTH08T240W 4PTB337MD6TER PTH08T241W TMS320 CI 7400 T530X108M2R5ASE005 597D227X
Contextual Info: PTH08T240W, PTH08T241W www.ti.com. SLTS264H – NOVEMBER 2005 – REVISED DECEMBER 2008 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED,

MAF C22

Abstract: PTH08T241WAD PTH08T240W PTH08T241W TMS320 SANYO 1000uF 35V C9030
Contextual Info: PTH08T240W, PTH08T241W www.ti.com . SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER